oota-llvm.git
12 years agoAllow v16i16 and v32i8 shuffles to be rewritten as narrower shuffles.
Craig Topper [Fri, 4 May 2012 04:44:49 +0000 (04:44 +0000)]
Allow v16i16 and v32i8 shuffles to be rewritten as narrower shuffles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156156 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd 'landingpad' instructions to the list of instructions to ignore.
Bill Wendling [Fri, 4 May 2012 04:22:32 +0000 (04:22 +0000)]
Add 'landingpad' instructions to the list of instructions to ignore.
Also combine the code in the 'assert' statement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156155 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSimplify shuffle narrowing code a bit. No functional change intended.
Craig Topper [Fri, 4 May 2012 04:08:44 +0000 (04:08 +0000)]
Simplify shuffle narrowing code a bit. No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156154 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove the SubRegClasses field from RegisterClass descriptions.
Jakob Stoklund Olesen [Fri, 4 May 2012 03:30:34 +0000 (03:30 +0000)]
Remove the SubRegClasses field from RegisterClass descriptions.

This information in now computed by TableGen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156152 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove TargetRegisterClass::SuperRegClasses.
Jakob Stoklund Olesen [Fri, 4 May 2012 03:30:28 +0000 (03:30 +0000)]
Remove TargetRegisterClass::SuperRegClasses.

This manually enumerated list of super-register classes has been
superceeded by the automatically computed super-register class masks
available through SuperRegClassIterator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156151 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoPass -fcolor-diagnostics when it is supported. This makes a difference when
Rafael Espindola [Fri, 4 May 2012 03:23:36 +0000 (03:23 +0000)]
Pass -fcolor-diagnostics when it is supported. This makes a difference when
using cmake+ninja, since ninja buffers the compiler output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156150 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUse SuperRegClassIterator for findRepresentativeClass().
Jakob Stoklund Olesen [Fri, 4 May 2012 02:19:22 +0000 (02:19 +0000)]
Use SuperRegClassIterator for findRepresentativeClass().

The masks returned by SuperRegClassIterator are computed automatically
by TableGen. This is better than depending on the manually specified
SuperRegClasses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156147 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoInitialize SparcInstrInfo before SparcTargetLowering.
Jakob Stoklund Olesen [Fri, 4 May 2012 02:16:39 +0000 (02:16 +0000)]
Initialize SparcInstrInfo before SparcTargetLowering.

The TargetLowering construction needs to use a valid TargetRegisterInfo
instance.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156146 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd a SuperRegClassIterator class.
Jakob Stoklund Olesen [Fri, 4 May 2012 01:48:29 +0000 (01:48 +0000)]
Add a SuperRegClassIterator class.

This iterator class provides a more abstract interface to the (Idx,
Mask) lists of super-registers for a register class. The layout of the
tables shouldn't be exposed to clients.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156144 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoA pile of long over-due refactorings here. There are some very, *very*
Chandler Carruth [Fri, 4 May 2012 00:58:03 +0000 (00:58 +0000)]
A pile of long over-due refactorings here. There are some very, *very*
minor behavior changes with this, but nothing I have seen evidence of in
the wild or expect to be meaningful. The real goal is unifying our logic
and simplifying the interfaces. A summary of the changes follows:

- Make 'callIsSmall' actually accept a callsite so it can handle
  intrinsics, and simplify callers appropriately.
- Nuke a completely bogus declaration of 'callIsSmall' that was still
  lurking in InlineCost.h... No idea how this got missed.
- Teach the 'isInstructionFree' about the various more intelligent
  'free' heuristics that got added to the inline cost analysis during
  review and testing. This mostly surrounds int->ptr and ptr->int casts.
- Switch most of the interesting parts of the inline cost analysis that
  were essentially computing 'is this instruction free?' to use the code
  metrics routine instead. This way we won't keep duplicating logic.

All of this is motivated by the desire to allow other passes to compute
a roughly equivalent 'cost' metric for a particular basic block as the
inline cost analysis. Sadly, re-using the same analysis for both is
really messy because only the actual inline cost analysis is ever going
to go to the contortions required for simplification, SROA analysis,
etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156140 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd a FoldingSetVector datastructure which is analogous to a SetVector,
Chandler Carruth [Thu, 3 May 2012 23:38:34 +0000 (23:38 +0000)]
Add a FoldingSetVector datastructure which is analogous to a SetVector,
but using a FoldingSet underneath and with a largely compatible
interface to that of FoldingSet. This can be used anywhere a FoldingSet
would be natural, but iteration order is significant. The initial
intended use case is in Clang's template specialization lists to
preserve instantiation order iteration.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156131 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoPR12729: Change 'llvm-objdump' to display the available targets.
Pete Cooper [Thu, 3 May 2012 23:20:10 +0000 (23:20 +0000)]
PR12729: Change 'llvm-objdump' to display the available targets.

Patch by Meador Inge.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156128 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove accidentally added file.
Jakob Stoklund Olesen [Thu, 3 May 2012 22:49:58 +0000 (22:49 +0000)]
Remove accidentally added file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156124 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUse a shared implementation of getMatchingSuperRegClass().
Jakob Stoklund Olesen [Thu, 3 May 2012 22:49:04 +0000 (22:49 +0000)]
Use a shared implementation of getMatchingSuperRegClass().

TargetRegisterClass now gives access to the necessary tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156122 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd TargetRegisterClass::getSuperRegIndices().
Jakob Stoklund Olesen [Thu, 3 May 2012 22:49:00 +0000 (22:49 +0000)]
Add TargetRegisterClass::getSuperRegIndices().

This is a pointer into one of the tables used by
getMatchingSuperRegClass(). It makes it possible to use a shared
implementation of that function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156121 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoEmit SuperRegMasks as part of the existing SubClassMask arrays.
Jakob Stoklund Olesen [Thu, 3 May 2012 22:48:56 +0000 (22:48 +0000)]
Emit SuperRegMasks as part of the existing SubClassMask arrays.

The RC->getSubClassMask() pointer now points to a sequence of register
class bit masks. The first bit mask is the normal sub-class mask. The
following masks are super-reg class masks used by
getMatchingSuperRegClass().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156120 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix issues with the ARM bl and blx thumb instructions and the J1 and J2 bits
Kevin Enderby [Thu, 3 May 2012 22:41:56 +0000 (22:41 +0000)]
Fix issues with the ARM bl and blx thumb instructions and the J1 and J2 bits
for the assembler and disassembler.  Which were not being set/read correctly
for offsets greater than 22 bits in some cases.

Changes to lib/Target/ARM/ARMAsmBackend.cpp from Gideon Myles!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156118 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFactor the logic for testing whether a basic block is viable for code
Chandler Carruth [Thu, 3 May 2012 22:26:53 +0000 (22:26 +0000)]
Factor the logic for testing whether a basic block is viable for code
extraction into a public interface. Also clean it up and apply it more
consistently such that we check for landing pads *anywhere* in the
extracted code, not just in single-block extraction.

This will be used to guide decisions in passes that are planning to
eventually perform a round of code extraction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156114 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoremove calls to calloc if the allocated memory is not used (it was already being...
Nuno Lopes [Thu, 3 May 2012 22:08:19 +0000 (22:08 +0000)]
remove calls to calloc if the allocated memory is not used (it was already being done for malloc)
fix a few typos found by Chad in my previous commit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156110 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSupport for target dependent Hexagon VLIW packetizer.
Sirish Pande [Thu, 3 May 2012 21:52:53 +0000 (21:52 +0000)]
Support for target dependent Hexagon VLIW packetizer.

This patch creates and optimizes packets as per Hexagon ISA rules.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156109 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd rudimentary CMake logic for detecting Graphviz.
Ted Kremenek [Thu, 3 May 2012 21:51:05 +0000 (21:51 +0000)]
Add rudimentary CMake logic for detecting Graphviz.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156108 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoadd support for calloc to objectsize lowering
Nuno Lopes [Thu, 3 May 2012 21:19:58 +0000 (21:19 +0000)]
add support for calloc to objectsize lowering

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156102 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix the type of SubClassMask.
Jakob Stoklund Olesen [Thu, 3 May 2012 18:17:32 +0000 (18:17 +0000)]
Fix the type of SubClassMask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156084 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCompress tables for getMatchingSuperRegClass().
Jakob Stoklund Olesen [Thu, 3 May 2012 18:14:20 +0000 (18:14 +0000)]
Compress tables for getMatchingSuperRegClass().

Many register classes only have a few super-registers, so it is not
necessary to keep individual bit masks for all possible sub-register
indices.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156083 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd the half type to the LLVM IR vim syntax highlighting.
Owen Anderson [Thu, 3 May 2012 17:24:12 +0000 (17:24 +0000)]
Add the half type to the LLVM IR vim syntax highlighting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156080 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFixed disassembler for vstm/vldm ARM VFP instructions.
Silviu Baranga [Thu, 3 May 2012 16:38:40 +0000 (16:38 +0000)]
Fixed disassembler for vstm/vldm ARM VFP instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156077 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoDon't override subreg functions in targets without subregisters.
Jakob Stoklund Olesen [Thu, 3 May 2012 16:26:20 +0000 (16:26 +0000)]
Don't override subreg functions in targets without subregisters.

Some targets have no sub-registers at all. Use the TargetRegisterInfo
versions of composeSubRegIndices(), getSubClassWithSubReg(), and
getMatchingSuperRegClass() for those targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156075 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoExtensions of Hexagon V4 instructions.
Sirish Pande [Thu, 3 May 2012 16:18:50 +0000 (16:18 +0000)]
Extensions of Hexagon V4 instructions.

This adds new instructions for Hexagon V4 architecture.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156071 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoreplace 'break's with 'return 0' in visitCallInst code for objectsize, since there...
Nuno Lopes [Thu, 3 May 2012 16:06:07 +0000 (16:06 +0000)]
replace 'break's with 'return 0' in visitCallInst code for objectsize, since there is no need to fallback to visitCallSite.
This gives a 0.9% in a test case

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156069 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUse correct variable in this example. Pointed out by waynix on IRC.
Duncan Sands [Thu, 3 May 2012 15:25:19 +0000 (15:25 +0000)]
Use correct variable in this example.  Pointed out by waynix on IRC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156067 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUse 'unsigned' instead of 'int' in a few places dealing with counts of vector elements.
Craig Topper [Thu, 3 May 2012 07:26:59 +0000 (07:26 +0000)]
Use 'unsigned' instead of 'int' in a few places dealing with counts of vector elements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156060 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix 256-bit vpshuflw and vpshufhw immediate encoding to handle undefs in the lower...
Craig Topper [Thu, 3 May 2012 07:12:59 +0000 (07:12 +0000)]
Fix 256-bit vpshuflw and vpshufhw immediate encoding to handle undefs in the lower half correctly. Missed in r155982.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156059 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix two-address pass's aggressive instruction commuting heuristics. It's meant
Evan Cheng [Thu, 3 May 2012 01:45:13 +0000 (01:45 +0000)]
Fix two-address pass's aggressive instruction commuting heuristics. It's meant
to catch cases like:
 %reg1024<def> = MOV r1
 %reg1025<def> = MOV r0
 %reg1026<def> = ADD %reg1024, %reg1025
 r0            = MOV %reg1026

By commuting ADD, it let coalescer eliminate all of the copies. However, there
was a bug in the heuristics where it ended up commuting the ADD in:

 %reg1024<def> = MOV r0
 %reg1025<def> = MOV 0
 %reg1026<def> = ADD %reg1024, %reg1025
 r0            = MOV %reg1026

That did no benefit but rather ensure the last MOV would not be coalesced.

rdar://11355268

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156048 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdded TargetRegisterInfo::getAllocatableClass.
Andrew Trick [Thu, 3 May 2012 01:14:37 +0000 (01:14 +0000)]
Added TargetRegisterInfo::getAllocatableClass.

The ensures that virtual registers always belong to an allocatable class.
If your target attempts to create a vreg for an operand that has no
allocatable register subclass, you will crash quickly.

This ensures that targets define register classes as intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156046 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoWhitespace cleanup.
Bill Wendling [Wed, 2 May 2012 23:43:23 +0000 (23:43 +0000)]
Whitespace cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156034 91177308-0d34-0410-b5e6-96231b3b80d8

12 years ago[docs] Include the Kaleidescope tutorial in the Sphinx docs build.
Daniel Dunbar [Wed, 2 May 2012 22:46:36 +0000 (22:46 +0000)]
[docs] Include the Kaleidescope tutorial in the Sphinx docs build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156032 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTeach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, just like...
Owen Anderson [Wed, 2 May 2012 22:17:40 +0000 (22:17 +0000)]
Teach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, just like it now knows for FMULs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156029 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFor Intel Atom, use ILP scheduling always, instead of ILP for 64 bit
Preston Gurd [Wed, 2 May 2012 22:02:02 +0000 (22:02 +0000)]
For Intel Atom, use ILP scheduling always, instead of ILP for 64 bit
and Hybrid for 32 bit, since benchmarks show ILP scheduling is better
most of the time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156028 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoChange the Intel Atom detection code to recognize
Preston Gurd [Wed, 2 May 2012 21:38:46 +0000 (21:38 +0000)]
Change the Intel Atom detection code to recognize
Lincroft and Medfield.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156025 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTeach DAG combine that multiplication by 1.0 can always be constant folded.
Owen Anderson [Wed, 2 May 2012 21:32:35 +0000 (21:32 +0000)]
Teach DAG combine that multiplication by 1.0 can always be constant folded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156023 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd tools/lld to .gitignore.
Michael J. Spencer [Wed, 2 May 2012 21:25:32 +0000 (21:25 +0000)]
Add tools/lld to .gitignore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156021 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM: Add missing two-operand VBIC aliases.
Jim Grosbach [Wed, 2 May 2012 21:11:56 +0000 (21:11 +0000)]
ARM: Add missing two-operand VBIC aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156019 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMove llvm-tblgen's StringMatcher into the TableGen library so it can
Douglas Gregor [Wed, 2 May 2012 17:32:48 +0000 (17:32 +0000)]
Move llvm-tblgen's StringMatcher into the TableGen library so it can
be used by clang-tblgen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156000 91177308-0d34-0410-b5e6-96231b3b80d8

12 years ago[llvm-c] Make a few function declarations proper prototypes
Anders Waldenborg [Wed, 2 May 2012 16:15:32 +0000 (16:15 +0000)]
[llvm-c] Make a few function declarations proper prototypes

This avoids warnings when included in a application that
uses -Wstrict-prototypes.

e.g: AsmPrinters.def:27:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155997 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoThis patch continues the work of adding instruction latencies for X86 Atom,
Preston Gurd [Wed, 2 May 2012 16:03:35 +0000 (16:03 +0000)]
This patch continues the work of adding instruction latencies for X86 Atom,
by providing the latencies for the instructions in X86InstrFPStack.td.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155996 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRevert r155853
Manman Ren [Wed, 2 May 2012 15:24:32 +0000 (15:24 +0000)]
Revert r155853

The commit is intended to fix rdar://10961709.
But it is the root cause of PR12720.
Revert it for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155992 91177308-0d34-0410-b5e6-96231b3b80d8

12 years ago[tsan] typo and style (thanks to Nick Lewycky)
Kostya Serebryany [Wed, 2 May 2012 13:12:19 +0000 (13:12 +0000)]
[tsan] typo and style (thanks to Nick Lewycky)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155986 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoThe value held in the vector may be RAUW'ed by some of the canonicalization
Bill Wendling [Wed, 2 May 2012 09:59:45 +0000 (09:59 +0000)]
The value held in the vector may be RAUW'ed by some of the canonicalization
methods. Use a weak value handle to keep up with this.
PR12245

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155984 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoDisallow YIELD and other allocated nop hints in pre-ARMv6 architectures.
Richard Barton [Wed, 2 May 2012 09:43:18 +0000 (09:43 +0000)]
Disallow YIELD and other allocated nop hints in pre-ARMv6 architectures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155983 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd support for selecting AVX2 vpshuflw and vpshufhw. Add decoding support for AsmPri...
Craig Topper [Wed, 2 May 2012 08:03:44 +0000 (08:03 +0000)]
Add support for selecting AVX2 vpshuflw and vpshufhw. Add decoding support for AsmPrinter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155982 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUpdate SmallVector to support move semantics if the host does.
John McCall [Wed, 2 May 2012 05:39:15 +0000 (05:39 +0000)]
Update SmallVector to support move semantics if the host does.
Note that support for rvalue references does not imply support
for the full set of move-related STL operations.

I've preserved support for an odd little thing in insert() where
we're trying to support inserting a new element from an existing
one.  If we actually want to support that, there's a lot more we
need to do:  insert can call either grow or push_back, neither of
which is safe against this particular use pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155979 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix unintentional use of operator bool.
John McCall [Wed, 2 May 2012 05:39:10 +0000 (05:39 +0000)]
Fix unintentional use of operator bool.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155978 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix the implementation of MachOObjectFile::isSectionZeroInit so it follows the MachO...
Eli Friedman [Wed, 2 May 2012 02:31:28 +0000 (02:31 +0000)]
Fix the implementation of MachOObjectFile::isSectionZeroInit so it follows the MachO spec.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155976 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTidy up. Naming conventions.
Jim Grosbach [Tue, 1 May 2012 23:21:41 +0000 (23:21 +0000)]
Tidy up. Naming conventions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155960 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove unneeded break.
Jakub Staszak [Tue, 1 May 2012 23:08:16 +0000 (23:08 +0000)]
Remove unneeded break.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155959 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUse dyn_cast instead of checking opcode and cast.
Jakub Staszak [Tue, 1 May 2012 23:06:00 +0000 (23:06 +0000)]
Use dyn_cast instead of checking opcode and cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155957 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove trailing spaces.
Jakub Staszak [Tue, 1 May 2012 23:04:38 +0000 (23:04 +0000)]
Remove trailing spaces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155956 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoStrip the pointer casts off of allocas so that the selection DAG can find them.
Bill Wendling [Tue, 1 May 2012 22:50:45 +0000 (22:50 +0000)]
Strip the pointer casts off of allocas so that the selection DAG can find them.
PR10799

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155954 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTarget independent Hexagon Packetizer fix.
Sirish Pande [Tue, 1 May 2012 21:28:30 +0000 (21:28 +0000)]
Target independent Hexagon Packetizer fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155947 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM: Add a few missing add->sub aliases w/ 'w' suffix.
Jim Grosbach [Tue, 1 May 2012 21:17:34 +0000 (21:17 +0000)]
ARM: Add a few missing add->sub aliases w/ 'w' suffix.

Aliases for adding a negative immediate when using an explicit 'w'
suffix. E.g.,
        adds.w r2, #-16
        adds.w r2, r2, #-16
        addw r2, #-16
        addw r2, #-16
        addw r2, r2, #-16

rdar://11330769

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155946 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM: allow vanilla expressions for movw/movt.
Jim Grosbach [Tue, 1 May 2012 20:43:21 +0000 (20:43 +0000)]
ARM: allow vanilla expressions for movw/movt.

Expressions for movw/movt don't always have an :upper16: or :lower16:
on them and that's ok. When they don't, it's just a plain [0-65536]
immediate result, effectively the same as a :lower16: variant kind.

rdar://10550147

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155941 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoThis patch marks the X86 floating point stack registers ST0-ST7 as reserved
Preston Gurd [Tue, 1 May 2012 19:50:22 +0000 (19:50 +0000)]
This patch marks the X86 floating point stack registers ST0-ST7 as reserved
in order to avoid assertion failures in the register scavenger. The assertion
failures were “Bad machine code: Using an undefined physical register” and
“Bad machine code: MBB exits via unconditional fall-through but its successor
differs from its CFG successor!”.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155930 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMC: Unknown assembler directives are now hard errors.
Jim Grosbach [Tue, 1 May 2012 18:38:27 +0000 (18:38 +0000)]
MC: Unknown assembler directives are now hard errors.

Previously, an unsupported/unknown assembler directive issued a warning.
That's generally unsafe, and inconsistent with the behaviour of pretty
much every system assembler. Now that the MC assemblers are mature
enough to be the default on multiple targets, it's reasonable to
issue errors for these.

For target or platform directives that need to stay warnings, we
should add explicit handlers for them in, e.g., ELFAsmParser.cpp,
DarwinAsmParser.cpp, et. al., and issue the warning there.

rdar://9246275

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155926 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMC: Remove errant EatToEndOfStatement() in asm parser.
Jim Grosbach [Tue, 1 May 2012 18:38:24 +0000 (18:38 +0000)]
MC: Remove errant EatToEndOfStatement() in asm parser.

The caller is already responsible for eating any additional input on the
line. Putting an additional EatToEndOfStatement() in ParseStatement()
causes an entire extra statement to be consumed when treating warnings
as errors. For example, test/MC/macros.s will assert() because the
.endmacro directive is missed as a result.

rdar://11355843

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155925 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoX86: optimization for max-like struct
Manman Ren [Tue, 1 May 2012 17:16:15 +0000 (17:16 +0000)]
X86: optimization for max-like struct

This patch will optimize the following cases on X86
(a > b) ? (a-b) : 0
(a >= b) ? (a-b) : 0
(b < a) ? (a-b) : 0
(b <= a) ? (a-b) : 0

FROM
movl    %edi, %ecx
subl    %esi, %ecx
cmpl    %edi, %esi
movl    $0, %eax
cmovll  %ecx, %eax
TO
xorl    %eax, %eax
subl    %esi, %edi
cmovll  %eax, %edi
movl    %edi, %eax

rdar: 10734411

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155919 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoX86: Use StackRegister instead of FrameRegister in getFrameIndexReference (to generat...
Alexey Samsonov [Tue, 1 May 2012 15:16:06 +0000 (15:16 +0000)]
X86: Use StackRegister instead of FrameRegister in getFrameIndexReference (to generate debug info for local variables) if stack needs realignment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155917 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMove MipsDisassembler classes into an anonymous namespace.
Benjamin Kramer [Tue, 1 May 2012 14:34:24 +0000 (14:34 +0000)]
Move MipsDisassembler classes into an anonymous namespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155915 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRegression test for PR2960.
Jay Foad [Tue, 1 May 2012 11:11:34 +0000 (11:11 +0000)]
Regression test for PR2960.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155912 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoValue-initialize global to avoid global construction.
Benjamin Kramer [Tue, 1 May 2012 10:48:02 +0000 (10:48 +0000)]
Value-initialize global to avoid global construction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155909 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRuntimeDyld cleanup:
Eli Bendersky [Tue, 1 May 2012 10:41:12 +0000 (10:41 +0000)]
RuntimeDyld cleanup:

- Improved parameter names for clarity
- Added comments
- emitCommonSymbols should return void because its return value is not being
  used anywhere
- Attempt to reduce the usage of the RelocationValueRef type. Restricts it
  for a single goal and may serve as a step for eventual removal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155908 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoYAMLParser: get rid of global ctors & dtors.
Benjamin Kramer [Tue, 1 May 2012 10:19:59 +0000 (10:19 +0000)]
YAMLParser: get rid of global ctors & dtors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155907 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoChange the PassManager from a reference to a pointer.
Bill Wendling [Tue, 1 May 2012 08:27:43 +0000 (08:27 +0000)]
Change the PassManager from a reference to a pointer.

The TargetPassManager's default constructor wants to initialize the PassManager
to 'null'. But it's illegal to bind a null reference to a null l-value. Make the
ivar a pointer instead.
PR12468

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155902 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAllow BMI, AES, F16C, POPCNT, FMA3, and CLMUL to be detected on AMD processors.
Craig Topper [Tue, 1 May 2012 07:10:32 +0000 (07:10 +0000)]
Allow BMI, AES, F16C, POPCNT, FMA3, and CLMUL to be detected on AMD processors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155899 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRuntimeDyld code cleanup:
Eli Bendersky [Tue, 1 May 2012 06:58:59 +0000 (06:58 +0000)]
RuntimeDyld code cleanup:

- There's no point having a different type for the local and global symbol
  tables.
- Renamed SymbolTable to GlobalSymbolTable to clarify the intention
- Improved const correctness where relevant

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155898 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMake XOP and FMA4 require SSE4A to match GCC behavior. Use this to simplify Bulldozer...
Craig Topper [Tue, 1 May 2012 06:54:48 +0000 (06:54 +0000)]
Make XOP and FMA4 require SSE4A to match GCC behavior. Use this to simplify Bulldozer feature list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155897 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAttempt to handle MRMInitReg in emitVEXOpcodePrefix. Hopefully fixes PR12711.
Craig Topper [Tue, 1 May 2012 06:34:01 +0000 (06:34 +0000)]
Attempt to handle MRMInitReg in emitVEXOpcodePrefix. Hopefully fixes PR12711.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155896 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemoved examples of stack frame inspection which no longer work for old JIT.
Eli Bendersky [Tue, 1 May 2012 06:15:40 +0000 (06:15 +0000)]
Removed examples of stack frame inspection which no longer work for old JIT.
Added an example of MCJIT-based debugging.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155895 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMake XOP imply AVX as its needed to legalize the registers types.
Craig Topper [Tue, 1 May 2012 05:41:41 +0000 (05:41 +0000)]
Make XOP imply AVX as its needed to legalize the registers types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155891 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove HasSSE2 from AES and CLMUL predicates. It's now implied by the HasAES and...
Craig Topper [Tue, 1 May 2012 05:35:02 +0000 (05:35 +0000)]
Remove HasSSE2 from AES and CLMUL predicates. It's now implied by the HasAES and HasCLMUL predicates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155890 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMake CLMUL and AES imply SSE2 since its needed to legalize the type.
Craig Topper [Tue, 1 May 2012 05:28:32 +0000 (05:28 +0000)]
Make CLMUL and AES imply SSE2 since its needed to legalize the type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155888 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoEnable AVX and FMA4 for AMD Bulldozer processors.
Craig Topper [Tue, 1 May 2012 05:18:13 +0000 (05:18 +0000)]
Enable AVX and FMA4 for AMD Bulldozer processors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155885 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAn instruction in a loop is not guaranteed to be executed just because the loop
Nick Lewycky [Tue, 1 May 2012 04:03:01 +0000 (04:03 +0000)]
An instruction in a loop is not guaranteed to be executed just because the loop
has no exit blocks. Fixes PR12706!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155884 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd support for llvm.arm.neon.vmull* intrinsics to InstCombine. Fixes
Lang Hames [Tue, 1 May 2012 00:20:38 +0000 (00:20 +0000)]
Add support for llvm.arm.neon.vmull* intrinsics to InstCombine. Fixes
<rdar://problem/11291436>.

This is a second attempt at a fix for this, the first was r155468. Thanks
to Chandler, Bob and others for the feedback that helped me improve this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155866 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd some constantness. No functionality change.
Jakub Staszak [Mon, 30 Apr 2012 23:41:30 +0000 (23:41 +0000)]
Add some constantness. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155859 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoX86: optimization for -(x != 0)
Manman Ren [Mon, 30 Apr 2012 22:51:25 +0000 (22:51 +0000)]
X86: optimization for -(x != 0)

This patch will optimize -(x != 0) on X86
FROM
cmpl $0x01,%edi
sbbl %eax,%eax
notl %eax
TO
negl %edi
sbbl %eax %eax

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155853 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM: Diagnostics for out of range fixups.
Jim Grosbach [Mon, 30 Apr 2012 22:30:43 +0000 (22:30 +0000)]
ARM: Diagnostics for out of range fixups.

Replace some assert() calls w/ actual diagnostics. In a perfect world,
there'd be range checks on these values long before things ever reached
this code. For now, though, issuing a better-late-than-never diagnostic
is still a big improvement over assert().

rdar://11347287

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155851 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix address calculation error from r155744.
Jakob Stoklund Olesen [Mon, 30 Apr 2012 20:19:00 +0000 (20:19 +0000)]
Fix address calculation error from r155744.

This was exposed by SingleSource/UnitTests/Vector/constpool.c.

The computed size of a basic block isn't always a multiple of its known
alignment, and that can introduce extra alignment padding after the
block.

<rdar://problem/11347135>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155845 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agofix typo
Sebastian Pop [Mon, 30 Apr 2012 20:06:58 +0000 (20:06 +0000)]
fix typo

Thanks to "Gabor Greif" <ggreif@gmail.com> for reporting this problem.

The configure flag should be --with-default-sysroot as documented, and
not --with-sysroot.  The reason we don't want to define --with-sysroot
is that GCC has a configure flag by that name and it has a different
semantics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155844 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agotest/CodeGen/X86/select.ll: remove spaces
Manman Ren [Mon, 30 Apr 2012 18:54:27 +0000 (18:54 +0000)]
test/CodeGen/X86/select.ll: remove spaces

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155840 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTidy up. No functional change intended.
Chad Rosier [Mon, 30 Apr 2012 17:47:15 +0000 (17:47 +0000)]
Tidy up.  No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155832 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix fastcc structure return with fast-isel on x86-32
Derek Schuff [Mon, 30 Apr 2012 16:57:15 +0000 (16:57 +0000)]
Fix fastcc structure return with fast-isel on x86-32

On x86-32, structure return via sret lets the callee pop the hidden
pointer argument off the stack, which the caller then re-pushes.
However if the calling convention is fastcc, then a register is used
instead, and the caller should not adjust the stack. This is
implemented with a check of IsTailCallConvention
X86TargetLowering::LowerCall but is now checked properly in
X86FastISel::DoSelectCall.

(this time, actually commit what was reviewed!)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155825 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoDon't introduce illegal types when creating vmull operations. <rdar://11324364>
Bob Wilson [Mon, 30 Apr 2012 16:53:34 +0000 (16:53 +0000)]
Don't introduce illegal types when creating vmull operations. <rdar://11324364>

ARM BUILD_VECTORs created after type legalization cannot use i8 or i16
operands, since those types are not legal.  Instead use i32 operands, which
will be implicitly truncated by the BUILD_VECTOR to match the element type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155824 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoIt doesn't make sense to move symbol relocations to section relocations when
Eli Bendersky [Mon, 30 Apr 2012 12:15:58 +0000 (12:15 +0000)]
It doesn't make sense to move symbol relocations to section relocations when
relocations are resolved.  It's much more reasonable to do this decision when
relocations are just being added - we have all the information at that point.

Also a bit of renaming and extra comments to clarify extensions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155819 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoJust mark the sign bit as known zero, rather than any other irrelevant bits
Duncan Sands [Mon, 30 Apr 2012 11:56:58 +0000 (11:56 +0000)]
Just mark the sign bit as known zero, rather than any other irrelevant bits
known zero in the LHS.  Fixes PR12541.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155818 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSecond attempt at PR12573:
Bill Wendling [Mon, 30 Apr 2012 10:44:54 +0000 (10:44 +0000)]
Second attempt at PR12573:

Allow the "SplitCriticalEdge" function to split the edge to a landing pad. If
the pass is *sure* that it thinks it knows what it's doing, then it may go ahead
and specify that the landing pad can have its critical edge split. The loop
unswitch pass is one of these passes. It will split the critical edges of all
edges coming from a loop to a landing pad not within the loop. Doing so will
retain important loop analysis information, such as loop simplify.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155817 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUse an ArrayRef instead of explicit vector type.
Bill Wendling [Mon, 30 Apr 2012 10:25:51 +0000 (10:25 +0000)]
Use an ArrayRef instead of explicit vector type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155816 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCode cleanup in RuntimeDyld:
Eli Bendersky [Mon, 30 Apr 2012 10:06:27 +0000 (10:06 +0000)]
Code cleanup in RuntimeDyld:

- Add comments
- Change field names to be more reasonable
- Fix indentation and naming to conform to coding conventions
- Remove unnecessary includes / replace them by forward declatations

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155815 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove hack from r154987. The problem persists even with it, so it's not even a good...
Bill Wendling [Mon, 30 Apr 2012 09:23:48 +0000 (09:23 +0000)]
Remove hack from r154987. The problem persists even with it, so it's not even a good hack.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155813 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoNo need to normalize index before calling Extract128BitVector
Craig Topper [Mon, 30 Apr 2012 05:17:10 +0000 (05:17 +0000)]
No need to normalize index before calling Extract128BitVector

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155811 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCopied all the VEX prefix encoding code from X86MCCodeEmitter to the x86 JIT emitter...
Pete Cooper [Mon, 30 Apr 2012 03:56:44 +0000 (03:56 +0000)]
Copied all the VEX prefix encoding code from X86MCCodeEmitter to the x86 JIT emitter.  Needs some major refactoring as these two code emitters are almost identical

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155810 91177308-0d34-0410-b5e6-96231b3b80d8