oota-llvm.git
12 years agoUse an existing function.
Jakob Stoklund Olesen [Tue, 6 Dec 2011 00:51:12 +0000 (00:51 +0000)]
Use an existing function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145883 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix unclear wording.
Jakob Stoklund Olesen [Tue, 6 Dec 2011 00:51:09 +0000 (00:51 +0000)]
Fix unclear wording.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145882 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMove target-specific logic out of generic MCAssembler.
Jim Grosbach [Tue, 6 Dec 2011 00:47:03 +0000 (00:47 +0000)]
Move target-specific logic out of generic MCAssembler.

Whether a fixup needs relaxation for the associated instruction is a
target-specific function, as the FIXME indicated. Create a hook for that
and use it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145881 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoExpose a switch for the new gcov format.
Nick Lewycky [Tue, 6 Dec 2011 00:29:13 +0000 (00:29 +0000)]
Expose a switch for the new gcov format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145880 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoProbably not a good idea to convert a single vector load into a memcpy. We
Chad Rosier [Tue, 6 Dec 2011 00:19:08 +0000 (00:19 +0000)]
Probably not a good idea to convert a single vector load into a memcpy.  We
don't do this now, but add a test case to prevent this from happening in the
future.
Additional test for rdar://9892684

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145879 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTidy up. Hard tabs.
Jim Grosbach [Tue, 6 Dec 2011 00:13:09 +0000 (00:13 +0000)]
Tidy up. Hard tabs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145878 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTidy up. Hard tabs.
Jim Grosbach [Tue, 6 Dec 2011 00:12:12 +0000 (00:12 +0000)]
Tidy up. Hard tabs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145877 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAll these arguments are default anyways.
Nick Lewycky [Tue, 6 Dec 2011 00:11:58 +0000 (00:11 +0000)]
All these arguments are default anyways.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145876 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTidy up. 80 columns.
Jim Grosbach [Tue, 6 Dec 2011 00:11:13 +0000 (00:11 +0000)]
Tidy up. 80 columns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145875 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSwitch MCAssembler to method names starting w/ lower-case.
Jim Grosbach [Tue, 6 Dec 2011 00:03:48 +0000 (00:03 +0000)]
Switch MCAssembler to method names starting w/ lower-case.

per http://llvm.org/docs/CodingStandards.html#ll_naming

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145873 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSimple branch relaxation for Thumb2 Bcc instructions.
Jim Grosbach [Mon, 5 Dec 2011 23:45:46 +0000 (23:45 +0000)]
Simple branch relaxation for Thumb2 Bcc instructions.

Not right yet, as the rules for when to relax in the MCAssembler aren't
(yet) correct for ARM. This is a step in the proper direction, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145871 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTidy up.
Jim Grosbach [Mon, 5 Dec 2011 23:20:14 +0000 (23:20 +0000)]
Tidy up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145870 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSilence tsan false-positives (tsan can't track things which are only safe due to
Nick Lewycky [Mon, 5 Dec 2011 23:07:05 +0000 (23:07 +0000)]
Silence tsan false-positives (tsan can't track things which are only safe due to
memory fences) in statistics registration, which works the same way that
ManagedStatic registration does.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145869 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUpdate comment.
Chad Rosier [Mon, 5 Dec 2011 22:53:09 +0000 (22:53 +0000)]
Update comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145866 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMake the MemCpyOptimizer a bit more aggressive. I can't think of a scenerio
Chad Rosier [Mon, 5 Dec 2011 22:37:00 +0000 (22:37 +0000)]
Make the MemCpyOptimizer a bit more aggressive.  I can't think of a scenerio
where this would be bad as the backend shouldn't have a problem inlining small
memcpys.
rdar://10510150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145865 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTweak ADDrr fix. Bad check for explicit .w
Jim Grosbach [Mon, 5 Dec 2011 22:27:04 +0000 (22:27 +0000)]
Tweak ADDrr fix. Bad check for explicit .w

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145863 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUpdate tests for r145860. Add a few new ones.
Jim Grosbach [Mon, 5 Dec 2011 22:21:28 +0000 (22:21 +0000)]
Update tests for r145860. Add a few new ones.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145861 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoThumb2 prefer ADD register encoding T2 to T3 when possible.
Jim Grosbach [Mon, 5 Dec 2011 22:16:39 +0000 (22:16 +0000)]
Thumb2 prefer ADD register encoding T2 to T3 when possible.

rdar://10529664

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145860 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMove 'returns_twice' definition into alphabetical place.
Bill Wendling [Mon, 5 Dec 2011 21:27:54 +0000 (21:27 +0000)]
Move 'returns_twice' definition into alphabetical place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145854 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd definitions of 64-bit extract and insert instrucions and make
Akira Hatanaka [Mon, 5 Dec 2011 21:26:34 +0000 (21:26 +0000)]
Add definitions of 64-bit extract and insert instrucions and make
PerformANDCombine and PerformOrCombine aware of them. Test cases are included
too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145853 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSplit ExtIns into two base classes and have instructions EXT and INS derive from
Akira Hatanaka [Mon, 5 Dec 2011 21:14:28 +0000 (21:14 +0000)]
Split ExtIns into two base classes and have instructions EXT and INS derive from
them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145852 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoThumb2 prefer encoding T3 to T4 for ADD/SUB immediate instructions.
Jim Grosbach [Mon, 5 Dec 2011 21:06:26 +0000 (21:06 +0000)]
Thumb2 prefer encoding T3 to T4 for ADD/SUB immediate instructions.

rdar://10529348

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145851 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoHave LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 and
Akira Hatanaka [Mon, 5 Dec 2011 21:03:03 +0000 (21:03 +0000)]
Have LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 and
O32 with relocation-model=pic too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145850 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM assembly parsing for the rest of the VMUL data type aliases.
Jim Grosbach [Mon, 5 Dec 2011 20:29:59 +0000 (20:29 +0000)]
ARM assembly parsing for the rest of the VMUL data type aliases.

Finish up rdar://10522016.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145846 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix previous commit. Oops.
Jim Grosbach [Mon, 5 Dec 2011 20:12:26 +0000 (20:12 +0000)]
Fix previous commit. Oops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145844 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTidy up. No functional change.
Jim Grosbach [Mon, 5 Dec 2011 20:09:44 +0000 (20:09 +0000)]
Tidy up. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145843 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM assmebler parsing for two-operand VMUL instructions.
Jim Grosbach [Mon, 5 Dec 2011 19:55:46 +0000 (19:55 +0000)]
ARM assmebler parsing for two-operand VMUL instructions.

Combined destination and first source operand for f32 variant of the VMUL
(by scalar) instruction.

rdar://10522016

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145842 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoChange the Dominators recalculate() function to only rely on GraphTraits
Anna Zaks [Mon, 5 Dec 2011 19:17:04 +0000 (19:17 +0000)]
Change the Dominators recalculate() function to only rely on GraphTraits

This is a patch by Guoping Long!

As part of utilizing LLVM Dominator computation in Clang, made two changes to LLVM dominators tree implementation:

 - (1) Change the recalculate() template function to only rely on GraphTraits.
 - (2) Add a size() method to GraphTraits template class to query the number of nodes in the graph.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145837 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd test case - this input used to crash because of duplicate generation of SPILL_CRs
Hal Finkel [Mon, 5 Dec 2011 17:55:22 +0000 (17:55 +0000)]
Add test case - this input used to crash because of duplicate generation of SPILL_CRs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145820 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoenable PPC register scavenging by default (update tests and remove some FIXMEs)
Hal Finkel [Mon, 5 Dec 2011 17:55:17 +0000 (17:55 +0000)]
enable PPC register scavenging by default (update tests and remove some FIXMEs)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145819 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agodon't include CR bit subregs in callee-saved list
Hal Finkel [Mon, 5 Dec 2011 17:55:12 +0000 (17:55 +0000)]
don't include CR bit subregs in callee-saved list

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145818 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoremove wasted space for extra bit copies of CR2 subregs
Hal Finkel [Mon, 5 Dec 2011 17:55:06 +0000 (17:55 +0000)]
remove wasted space for extra bit copies of CR2 subregs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145817 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoadd register pressure for CR regs
Hal Finkel [Mon, 5 Dec 2011 17:54:17 +0000 (17:54 +0000)]
add register pressure for CR regs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145816 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd a little heuristic to Value::isUsedInBasicBlock to speed it up for small basic...
Benjamin Kramer [Mon, 5 Dec 2011 17:23:27 +0000 (17:23 +0000)]
Add a little heuristic to Value::isUsedInBasicBlock to speed it up for small basic blocks.

- Calling getUser in a loop is much more expensive than iterating over a few instructions.
- Use it instead of the open-coded loop in AddrModeMatcher.
- 5% speedup on ARMDisassembler.cpp Release builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145810 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agotest/CodeGen/X86/pointer-vector.ll: Add explicit -mtriple=i686-linux.
NAKAMURA Takumi [Mon, 5 Dec 2011 07:54:57 +0000 (07:54 +0000)]
test/CodeGen/X86/pointer-vector.ll: Add explicit -mtriple=i686-linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145805 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove some leftover remnants that once tried to create 64-bit MMX PALIGNR instructions.
Craig Topper [Mon, 5 Dec 2011 07:27:14 +0000 (07:27 +0000)]
Remove some leftover remnants that once tried to create 64-bit MMX PALIGNR instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145804 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoClean up and optimizations to the X86 shuffle lowering code. No functional change.
Craig Topper [Mon, 5 Dec 2011 06:56:46 +0000 (06:56 +0000)]
Clean up and optimizations to the X86 shuffle lowering code. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145803 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd support for vectors of pointers.
Nadav Rotem [Mon, 5 Dec 2011 06:29:09 +0000 (06:29 +0000)]
Add support for vectors of pointers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145801 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix table of contents.
Jakub Staszak [Sun, 4 Dec 2011 20:44:25 +0000 (20:44 +0000)]
Fix table of contents.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145793 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd 'llvm.expect' intrinsic description.
Jakub Staszak [Sun, 4 Dec 2011 18:29:26 +0000 (18:29 +0000)]
Add 'llvm.expect' intrinsic description.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145792 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd inline subprogram names to the name lookup table since they may
Eric Christopher [Sun, 4 Dec 2011 06:02:38 +0000 (06:02 +0000)]
Add inline subprogram names to the name lookup table since they may
not get there any other way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145789 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix 80-column issues.
Bob Wilson [Sun, 4 Dec 2011 00:52:23 +0000 (00:52 +0000)]
Fix 80-column issues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145783 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoEmit the ctors in the proper order on ARM/EABI.
Anton Korobeynikov [Sat, 3 Dec 2011 23:49:37 +0000 (23:49 +0000)]
Emit the ctors in the proper order on ARM/EABI.
Maybe some targets should use this as well.

Patch by Evgeniy Stepanov!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145781 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since
Venkatraman Govindaraju [Sat, 3 Dec 2011 21:24:48 +0000 (21:24 +0000)]
Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since
AnalyzeBranch doesn't change the successor, just the order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145779 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSimplify code. No functionality change.
Benjamin Kramer [Sat, 3 Dec 2011 16:18:22 +0000 (16:18 +0000)]
Simplify code. No functionality change.

-3% on ARMDissasembler.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145773 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoClear the new cache.
Benjamin Kramer [Sat, 3 Dec 2011 15:19:55 +0000 (15:19 +0000)]
Clear the new cache.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145771 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd a "seen blocks" cache to LVI to avoid a linear scan over the whole cache just...
Benjamin Kramer [Sat, 3 Dec 2011 15:16:45 +0000 (15:16 +0000)]
Add a "seen blocks" cache to LVI to avoid a linear scan over the whole cache just to remove no blocks from the maps.

-15% on ARMDisassembler.cpp (Release build).  It's not that great to add another
layer of caching to the caching-heavy LVI but I don't see a better way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145770 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCheck for stack space more intelligently.
Sanjoy Das [Sat, 3 Dec 2011 09:32:07 +0000 (09:32 +0000)]
Check for stack space more intelligently.

libgcc sets the stack limit field in TCB to 256 bytes above the actual
allocated stack limit.  This means if the function's stack frame needs
less than 256 bytes, we can just compare the stack pointer with the
stack limit.  This should result in lesser calls to __morestack.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145766 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix a bug in the x86-32 code generated for segmented stacks.
Sanjoy Das [Sat, 3 Dec 2011 09:21:07 +0000 (09:21 +0000)]
Fix a bug in the x86-32 code generated for segmented stacks.

Currently LLVM pads the call to __morestack with a add and sub of 8
bytes to esp.  This isn't correct since __morestack expects the call
to be followed directly by a ret.

This commit also adjusts the relevant test-case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145765 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCreating multiple JITs on X86 in multiple threads causes multiple writes (of
Nick Lewycky [Sat, 3 Dec 2011 02:45:50 +0000 (02:45 +0000)]
Creating multiple JITs on X86 in multiple threads causes multiple writes (of
the same value) to this variable. This code could be refactored, but it doesn't
matter since the old JIT is going away. Add tsan annotations to ignore the
race.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145745 91177308-0d34-0410-b5e6-96231b3b80d8

12 years ago[arm-fast-isel] Unaligned stores of floats require special care.
Chad Rosier [Sat, 3 Dec 2011 02:21:57 +0000 (02:21 +0000)]
[arm-fast-isel] Unaligned stores of floats require special care.
rdar://10510150

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145742 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFixed deadstoreelimination bug where negative indices were incorrectly causing the...
Pete Cooper [Sat, 3 Dec 2011 00:04:30 +0000 (00:04 +0000)]
Fixed deadstoreelimination bug where negative indices were incorrectly causing the optimisation to occur

Turns out long long + unsigned long long is unsigned.  Doh!

Fixes http://llvm.org/bugs/show_bug.cgi?id=11455

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145731 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd support for constant folding the pow intrinsic.
Chad Rosier [Sat, 3 Dec 2011 00:00:03 +0000 (00:00 +0000)]
Add support for constant folding the pow intrinsic.
rdar://10514247

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145730 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM NEON VEXT aliases for data type suffices.
Jim Grosbach [Fri, 2 Dec 2011 23:34:39 +0000 (23:34 +0000)]
ARM NEON VEXT aliases for data type suffices.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145726 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM VEXT tighten up operand classes a bit.
Jim Grosbach [Fri, 2 Dec 2011 22:57:57 +0000 (22:57 +0000)]
ARM VEXT tighten up operand classes a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145722 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM VST1 single lane assembly parsing.
Jim Grosbach [Fri, 2 Dec 2011 22:34:51 +0000 (22:34 +0000)]
ARM VST1 single lane assembly parsing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145718 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTest cases for 64-bit multiplication and division.
Akira Hatanaka [Fri, 2 Dec 2011 22:31:36 +0000 (22:31 +0000)]
Test cases for 64-bit multiplication and division.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145717 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix test cases to use FileCheck.
Akira Hatanaka [Fri, 2 Dec 2011 22:28:09 +0000 (22:28 +0000)]
Fix test cases to use FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145716 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMove global variables in TargetMachine into new TargetOptions class. As an API
Nick Lewycky [Fri, 2 Dec 2011 22:16:29 +0000 (22:16 +0000)]
Move global variables in TargetMachine into new TargetOptions class. As an API
change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.

One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145714 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM tests for VLD1 single lane w/ writeback.
Jim Grosbach [Fri, 2 Dec 2011 22:03:52 +0000 (22:03 +0000)]
ARM tests for VLD1 single lane w/ writeback.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145713 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM VLD1 single lane assembly parsing.
Jim Grosbach [Fri, 2 Dec 2011 22:01:52 +0000 (22:01 +0000)]
ARM VLD1 single lane assembly parsing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145712 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM encoder method needs the physical register number, not the enum.
Jim Grosbach [Fri, 2 Dec 2011 22:01:25 +0000 (22:01 +0000)]
ARM encoder method needs the physical register number, not the enum.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145711 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTargetMachine: document unnamed bool argument
Dylan Noblesmith [Fri, 2 Dec 2011 20:53:57 +0000 (20:53 +0000)]
TargetMachine: document unnamed bool argument

Its meaning was slightly mysterious without looking at
subclasses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145705 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agounittests: add ErrorStr to ExecutionEngine test
Dylan Noblesmith [Fri, 2 Dec 2011 20:53:53 +0000 (20:53 +0000)]
unittests: add ErrorStr to ExecutionEngine test

Makes failures more self-explanatory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145704 91177308-0d34-0410-b5e6-96231b3b80d8

12 years ago[arm-fast-isel] After promoting a function parameter be sure to update the
Chad Rosier [Fri, 2 Dec 2011 20:25:18 +0000 (20:25 +0000)]
[arm-fast-isel] After promoting a function parameter be sure to update the
argument value type.  Otherwise, the sign/zero-extend has no effect on arguments
passed via the stack (i.e., undefined high-order bits).
rdar://10515467

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145701 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agospecify cpu for test to fix failure on some darwin systems with a g4+ cpu
Hal Finkel [Fri, 2 Dec 2011 19:38:17 +0000 (19:38 +0000)]
specify cpu for test to fix failure on some darwin systems with a g4+ cpu

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145699 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoClean up aliases for ARM VLD1 single-lane assembly parsing a bit.
Jim Grosbach [Fri, 2 Dec 2011 18:52:30 +0000 (18:52 +0000)]
Clean up aliases for ARM VLD1 single-lane assembly parsing a bit.

Add the 16-bit lane variants while I'm at it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145693 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix quadratic behavior in InlineFunction by fetching the personality function of...
Benjamin Kramer [Fri, 2 Dec 2011 18:37:31 +0000 (18:37 +0000)]
Fix quadratic behavior in InlineFunction by fetching the personality function of the callee once and not for every invoke in the caller.

The callee is usually smaller than the caller, too. This reduces the compile
time of ARMDisassembler.cpp by 32% (Release build). It still takes ages to
compile though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145690 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCheck for error after InstantiateMultclassDef.
Jim Grosbach [Fri, 2 Dec 2011 18:33:03 +0000 (18:33 +0000)]
Check for error after InstantiateMultclassDef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145689 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd XOP feature flag.
Jan Sjödin [Fri, 2 Dec 2011 15:14:37 +0000 (15:14 +0000)]
Add XOP feature flag.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145682 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoReduce duplicate code in isHorizontalBinOp and add some asserts to protect assumptions
Craig Topper [Fri, 2 Dec 2011 08:18:41 +0000 (08:18 +0000)]
Reduce duplicate code in isHorizontalBinOp and add some asserts to protect assumptions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145681 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd instruction selection support for horizontal add/sub of 256-bit floating point...
Craig Topper [Fri, 2 Dec 2011 07:16:01 +0000 (07:16 +0000)]
Add instruction selection support for horizontal add/sub of 256-bit floating point vectors. Also add the test case for 256-bit integer vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145680 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoremove unneeded FIXME comment
Hal Finkel [Fri, 2 Dec 2011 04:58:17 +0000 (04:58 +0000)]
remove unneeded FIXME comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145679 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoadjust the instruction ordering in some PPC tests: changes due to postRA haz. rec.
Hal Finkel [Fri, 2 Dec 2011 04:58:12 +0000 (04:58 +0000)]
adjust the instruction ordering in some PPC tests: changes due to postRA haz. rec.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145678 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agomake sure ScheduleDAGInstrs::EmitSchedule does not crash when the first instruction...
Hal Finkel [Fri, 2 Dec 2011 04:58:07 +0000 (04:58 +0000)]
make sure ScheduleDAGInstrs::EmitSchedule does not crash when the first instruction in Sequence is a Noop

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145677 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoupdate PPC 940 hazard rec. to function in postRA mode
Hal Finkel [Fri, 2 Dec 2011 04:58:02 +0000 (04:58 +0000)]
update PPC 940 hazard rec. to function in postRA mode

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145676 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix a few more places where TargetData/TargetLibraryInfo is not being passed.
Chad Rosier [Fri, 2 Dec 2011 01:26:24 +0000 (01:26 +0000)]
Fix a few more places where TargetData/TargetLibraryInfo is not being passed.
Add FIXMEs to places that are non-trivial to fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145661 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM start parsing VLD1 single lane instructions.
Jim Grosbach [Fri, 2 Dec 2011 00:35:16 +0000 (00:35 +0000)]
ARM start parsing VLD1 single lane instructions.

The alias pseudos need cleaned up for size suffix handling, but this gets
the basics working. Will be cleaning up and adding more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145655 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAbuse of mass replace isn't warranted even when the build is failing. Thanks
Chad Rosier [Thu, 1 Dec 2011 23:16:03 +0000 (23:16 +0000)]
Abuse of mass replace isn't warranted even when the build is failing.  Thanks
for the suggestion, Eric.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145643 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix build by not assuming TLI is guaranteed. Will have to track down cases where
Chad Rosier [Thu, 1 Dec 2011 22:38:31 +0000 (22:38 +0000)]
Fix build by not assuming TLI is guaranteed. Will have to track down cases where
TLI isn't being passed to ensure we don't miss opportunities to fold calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145641 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoPrevent library calls from being folded if -fno-builtin has been specified.
Chad Rosier [Thu, 1 Dec 2011 22:14:50 +0000 (22:14 +0000)]
Prevent library calls from being folded if -fno-builtin has been specified.
rdar://10500969

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145639 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTableGen: fix CMake build s'more
Dylan Noblesmith [Thu, 1 Dec 2011 21:53:39 +0000 (21:53 +0000)]
TableGen: fix CMake build s'more

Oops, missed another missing file from r145629.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145636 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCodeGen: fix CMake build
Dylan Noblesmith [Thu, 1 Dec 2011 21:49:23 +0000 (21:49 +0000)]
CodeGen: fix CMake build

Missing file from r145629.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145634 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoExecutionEngine: honor optimization level
Dylan Noblesmith [Thu, 1 Dec 2011 21:49:21 +0000 (21:49 +0000)]
ExecutionEngine: honor optimization level

It was getting ignored after r144788.

Also fix an accidental implicit cast from the OptLevel enum
to an optional bool argument. MSVC warned on this, but gcc
didn't.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145633 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoLast bit of TargetLibraryInfo propagation. Also fixed a case for TargetData
Chad Rosier [Thu, 1 Dec 2011 21:29:16 +0000 (21:29 +0000)]
Last bit of TargetLibraryInfo propagation.  Also fixed a case for TargetData
where it appeared beneficial to pass.
More of rdar://10500969

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145630 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd a deterministic finite automaton based packetizer for VLIW architectures
Anshuman Dasgupta [Thu, 1 Dec 2011 21:10:21 +0000 (21:10 +0000)]
Add a deterministic finite automaton based packetizer for VLIW architectures

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145629 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix unreachable return & simplify some branches.
David Blaikie [Thu, 1 Dec 2011 20:58:30 +0000 (20:58 +0000)]
Fix unreachable return & simplify some branches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145627 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agollvm-config: Replace with C++ version (was llvm-config-2).
Daniel Dunbar [Thu, 1 Dec 2011 20:18:09 +0000 (20:18 +0000)]
llvm-config: Replace with C++ version (was llvm-config-2).
   - Another reapply of r144300, with hopefully one last fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145623 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agollvm-config-2: Fix --cflags and --includedir which pointed at the wrong
Daniel Dunbar [Thu, 1 Dec 2011 20:00:19 +0000 (20:00 +0000)]
llvm-config-2: Fix --cflags and --includedir which pointed at the wrong
directory when running from a build directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145622 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoDummy commit to check commit access.
Sanjoy Das [Thu, 1 Dec 2011 19:15:08 +0000 (19:15 +0000)]
Dummy commit to check commit access.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145619 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoImproved fix for abs(val) != 0 to check other similar case. Also fixed style issues...
Pete Cooper [Thu, 1 Dec 2011 19:13:26 +0000 (19:13 +0000)]
Improved fix for abs(val) != 0 to check other similar case.  Also fixed style issues and confusing comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145618 91177308-0d34-0410-b5e6-96231b3b80d8

12 years ago[asan] two minor fixes: use UnreachableInst after the neverreturn function call;...
Kostya Serebryany [Thu, 1 Dec 2011 18:54:53 +0000 (18:54 +0000)]
[asan] two minor fixes: use UnreachableInst after the neverreturn function call; use report_fatal_error when blacklist file can not be found

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145611 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd missing functions.
Chad Rosier [Thu, 1 Dec 2011 18:26:19 +0000 (18:26 +0000)]
Add missing functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145608 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAutodetect bulldozers.
Benjamin Kramer [Thu, 1 Dec 2011 18:24:17 +0000 (18:24 +0000)]
Autodetect bulldozers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145607 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd a few more functions to TargetLibraryInfo. More of rdar://10500969.
Chad Rosier [Thu, 1 Dec 2011 17:54:37 +0000 (17:54 +0000)]
Add a few more functions to TargetLibraryInfo. More of rdar://10500969.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145596 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agofix broken tag
Chris Lattner [Thu, 1 Dec 2011 17:25:28 +0000 (17:25 +0000)]
fix broken tag

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145590 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRevert commit 145449 (ddunbar) since it is breaking the dragonegg buildbots.
Duncan Sands [Thu, 1 Dec 2011 10:50:19 +0000 (10:50 +0000)]
Revert commit 145449 (ddunbar) since it is breaking the dragonegg buildbots.
Original commit message:
llvm-config: Replace with C++ version (was llvm-config-2).
 - Reapply of r144300, with lots of fixes/migration easement in between.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145582 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFor 64-bit the rest of the general regs are ok for the q constraint. Make
Eric Christopher [Thu, 1 Dec 2011 08:12:41 +0000 (08:12 +0000)]
For 64-bit the rest of the general regs are ok for the q constraint. Make
sure we can emit both the high and low versions of those registers.

Fixes rdar://10392864

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145579 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd some missing anchors.
David Blaikie [Thu, 1 Dec 2011 08:00:17 +0000 (08:00 +0000)]
Add some missing anchors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145578 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoPass AVX vectors which are arguments to varargs functions on the stack. <rdar://probl...
Eli Friedman [Thu, 1 Dec 2011 04:49:21 +0000 (04:49 +0000)]
Pass AVX vectors which are arguments to varargs functions on the stack. <rdar://problem/10463281>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145573 91177308-0d34-0410-b5e6-96231b3b80d8