brg

InstSelectSimple.cpp: Add some comments that say what I'm going to do for
 calls and casts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4832 91177308-0d34-0410-b5e6-96231b3b80d8

Keep global nodes in each DS Graph (by forcing them to be marked live).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4831 91177308-0d34-0410-b5e6-96231b3b80d8

Oops. Got the MOVrm and MOVmr mixed up. Fixed. We can now print out
instructions correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4830 91177308-0d34-0410-b5e6-96231b3b80d8

Enable the register allocator pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4829 91177308-0d34-0410-b5e6-96231b3b80d8

A simple (spilling) register allocator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4828 91177308-0d34-0410-b5e6-96231b3b80d8

Added methods to read/write values to stack in .h, fixed implementation in
.cpp to return the iterator correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4827 91177308-0d34-0410-b5e6-96231b3b80d8

Added -*- C++ -*- mode to the comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4826 91177308-0d34-0410-b5e6-96231b3b80d8

Add a simple way to add memory locations of format [reg+offset]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4825 91177308-0d34-0410-b5e6-96231b3b80d8

Added virtual functions for storing and retrieving values from the stack.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4824 91177308-0d34-0410-b5e6-96231b3b80d8

Instead of checking op.getType() against MO_VirtualRegister and
MO_MachineRegister, we no longer distinguish Virtual vs. Machine registers
externally, they're ALL registers, all equal.

Registers are only differentiated whether they are >=
MRegisterInfo::FirstVirtual or not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4823 91177308-0d34-0410-b5e6-96231b3b80d8

Set SSARegMap to NULL after deleting it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4822 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/InstSelectSimple.cpp: Add visitCallInst, visitCastInst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4821 91177308-0d34-0410-b5e6-96231b3b80d8

Make testcase more interesting

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4820 91177308-0d34-0410-b5e6-96231b3b80d8

Handle cmp Reg, 0 correctly

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4819 91177308-0d34-0410-b5e6-96231b3b80d8

Printing support for more stuff

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4818 91177308-0d34-0410-b5e6-96231b3b80d8

Don't add implicit operands

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4817 91177308-0d34-0410-b5e6-96231b3b80d8

Fix off by one bug

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4816 91177308-0d34-0410-b5e6-96231b3b80d8

Add fixme

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4815 91177308-0d34-0410-b5e6-96231b3b80d8

Minor code cleanups

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4814 91177308-0d34-0410-b5e6-96231b3b80d8

Implement printing of store instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4813 91177308-0d34-0410-b5e6-96231b3b80d8

The big change here is to handle printing/emission of X86II::MRMSrcMem
instructions.  Right now the only users are load instructions, and Misha's
spill code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4812 91177308-0d34-0410-b5e6-96231b3b80d8

Remove implicit information from instruction selector

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4811 91177308-0d34-0410-b5e6-96231b3b80d8

Add printing information for MUL and DIV

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4810 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a bug that prevented compilation of multiple functions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4809 91177308-0d34-0410-b5e6-96231b3b80d8

Move test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4808 91177308-0d34-0410-b5e6-96231b3b80d8

Shuffle testcases around

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4807 91177308-0d34-0410-b5e6-96231b3b80d8

New testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4806 91177308-0d34-0410-b5e6-96231b3b80d8

Remove opcode information for instructions that are completely defined now

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4805 91177308-0d34-0410-b5e6-96231b3b80d8

Add printing support for sahf & setcc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4804 91177308-0d34-0410-b5e6-96231b3b80d8

Add printing support for /0 /1 type instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4803 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for /0 /1, etc type instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4802 91177308-0d34-0410-b5e6-96231b3b80d8

User defined operators are not supposed to live beyond the lifetime of the
pass.  Detect and flag them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4801 91177308-0d34-0410-b5e6-96231b3b80d8

Rename the SetCC X86 instructions to reflect the fact that they are the
register versions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4800 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify setcc code a bit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4799 91177308-0d34-0410-b5e6-96231b3b80d8

Support Registers of the form (B8+ rd) for example

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4798 91177308-0d34-0410-b5e6-96231b3b80d8

Dont' set flags

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4797 91177308-0d34-0410-b5e6-96231b3b80d8

Implement printing more, implement opcode output more

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4796 91177308-0d34-0410-b5e6-96231b3b80d8

Huge diff do to reindeinting comments.
Basically just adds OpSize flags for instructions that need them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4795 91177308-0d34-0410-b5e6-96231b3b80d8

Add new prefix flag

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4794 91177308-0d34-0410-b5e6-96231b3b80d8

Print another class of instructions correctly, giving us: xorl EDX, EDX
for example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4793 91177308-0d34-0410-b5e6-96231b3b80d8

Booleans are types too. And they get stored in bytes. And InstructionSelection
doesn't assert fail. And everyone's happy. Yay!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4792 91177308-0d34-0410-b5e6-96231b3b80d8

Checkin testcases for bugpoint

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4791 91177308-0d34-0410-b5e6-96231b3b80d8

Build bugpoint

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4790 91177308-0d34-0410-b5e6-96231b3b80d8

Initial checkin of bugpoint

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4789 91177308-0d34-0410-b5e6-96231b3b80d8

Initial checkin of Module cloning support stuff

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4788 91177308-0d34-0410-b5e6-96231b3b80d8

Cloning stuff doesn't modify the source module

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4787 91177308-0d34-0410-b5e6-96231b3b80d8

X86 target builds fine now

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4786 91177308-0d34-0410-b5e6-96231b3b80d8

Fix symbol table problem

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4785 91177308-0d34-0410-b5e6-96231b3b80d8

Add definitions for function headers from MRegisterInfo.h:
Some functions are in X86RegisterInfo.cpp, others, because of the data they
need, are in X86RegisterClasses.cpp, which also defines some register classes:
byte, short, and int.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4784 91177308-0d34-0410-b5e6-96231b3b80d8

Check not only for MO_VirtualRegister, but MO_MachineRegister as well when
printing out assembly. After all, we want the real thing too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4783 91177308-0d34-0410-b5e6-96231b3b80d8

Initialize the SSARegMap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4782 91177308-0d34-0410-b5e6-96231b3b80d8

MRegisterInfo.h - Added prototypes for functions we need to map a register to
an appropriate TargetRegisterClass, also adds TargetRegisterClass definition.
TargetMachine.h - speling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4781 91177308-0d34-0410-b5e6-96231b3b80d8

Don't build X86 target yet

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4780 91177308-0d34-0410-b5e6-96231b3b80d8

  - Eliminated the deferred symbol table stuff in Module & Function, it really
    wasn't an optimization and it was causing lots of bugs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4779 91177308-0d34-0410-b5e6-96231b3b80d8

Fix minor bugs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4778 91177308-0d34-0410-b5e6-96231b3b80d8

Eliminate the concept of a deferred symbol table.  The optimization really isn't,
and it causes obscure bugs to show up in passes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4777 91177308-0d34-0410-b5e6-96231b3b80d8

Add mapping in MachineFunction from SSA regs to Register Classes. Also,
uncovered a bug where registers were not being put in a map if they were not
found...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4776 91177308-0d34-0410-b5e6-96231b3b80d8

Sigh. Fixed some speling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4775 91177308-0d34-0410-b5e6-96231b3b80d8

SSARegMap -- the mapping between SSARegisters and their RegisterClasses, which
imply types of SSA Registers. This is on a per-function basis, so the
MachineFunction contains the SSARegMap, and has accessor functions to it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4774 91177308-0d34-0410-b5e6-96231b3b80d8

Thanks to the R8, R16, and R32 macros, I can now deal with registers that
belong to different register classes easier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4773 91177308-0d34-0410-b5e6-96231b3b80d8

Remove unneccesary #include

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4772 91177308-0d34-0410-b5e6-96231b3b80d8

Implement the CloneFunction function

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4771 91177308-0d34-0410-b5e6-96231b3b80d8

Minor changes to cloning interface

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4770 91177308-0d34-0410-b5e6-96231b3b80d8

Fix two fixmes: integrate with inlining, and document

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4769 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for bugpoint

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4768 91177308-0d34-0410-b5e6-96231b3b80d8

Extend function cloning interface to support inlining

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4767 91177308-0d34-0410-b5e6-96231b3b80d8

Rework inline pass to use cloning infrastructure to do the dirty work

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4766 91177308-0d34-0410-b5e6-96231b3b80d8

This file is supersumed by Utils/Cloning.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4765 91177308-0d34-0410-b5e6-96231b3b80d8

Start using the new function cloning header

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4764 91177308-0d34-0410-b5e6-96231b3b80d8

Merge cloning and inlining utilities

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4763 91177308-0d34-0410-b5e6-96231b3b80d8

Move MutatStructTypes.h out of IPO

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4762 91177308-0d34-0410-b5e6-96231b3b80d8

Move inlining pass to IPO.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4761 91177308-0d34-0410-b5e6-96231b3b80d8

Rename CloneFunction.h to Cloning.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4760 91177308-0d34-0410-b5e6-96231b3b80d8

Move the function extractor pass from tools/extract into lib/Xform/IPO

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4759 91177308-0d34-0410-b5e6-96231b3b80d8

Add a new Module::getNamedFunction method

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4758 91177308-0d34-0410-b5e6-96231b3b80d8

Ignore options that are ""

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4757 91177308-0d34-0410-b5e6-96231b3b80d8

Remove extra target.a entry

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4756 91177308-0d34-0410-b5e6-96231b3b80d8

Brian Gaeke says:

lib/Target/X86/InstSelectSimple.cpp: Add a little something to
 visitBranchInst which supports conditional branches.
lib/Target/X86/X86InstrInfo.def: Add defs of JNE, JE, CMPri8

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4755 91177308-0d34-0410-b5e6-96231b3b80d8

*** empty log message ***

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4754 91177308-0d34-0410-b5e6-96231b3b80d8

Add peak memory usage measurement capability
Add (currently disabled) faciility to try to filter out pool allocation overhead from memory usage stats

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4753 91177308-0d34-0410-b5e6-96231b3b80d8

Add facility to compute peak memory usage

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4752 91177308-0d34-0410-b5e6-96231b3b80d8

Inline DSTypeRec stuff into DSNode

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4751 91177308-0d34-0410-b5e6-96231b3b80d8

Inline DSTypeRec into DSNode

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4750 91177308-0d34-0410-b5e6-96231b3b80d8

Add peak memory usage measurement stuff
Add structure padding optimizations

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4749 91177308-0d34-0410-b5e6-96231b3b80d8

Add peak memory usage support

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4748 91177308-0d34-0410-b5e6-96231b3b80d8

Add stats

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4747 91177308-0d34-0410-b5e6-96231b3b80d8

Templatize graph traits and iterator to work with const and non-const clients

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4746 91177308-0d34-0410-b5e6-96231b3b80d8

*** empty log message ***

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4745 91177308-0d34-0410-b5e6-96231b3b80d8

Add helper method

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4744 91177308-0d34-0410-b5e6-96231b3b80d8

Start trying to print instructions more correctly.  For now we also print out the opcode for each instruction as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4743 91177308-0d34-0410-b5e6-96231b3b80d8

Expose base opcode

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4742 91177308-0d34-0410-b5e6-96231b3b80d8

Start to add more information to instr.def

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4741 91177308-0d34-0410-b5e6-96231b3b80d8

Add instruction annotation about whether it has a 0x0F opcode prefix

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4740 91177308-0d34-0410-b5e6-96231b3b80d8

Add more void flags

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4739 91177308-0d34-0410-b5e6-96231b3b80d8

Set the void flag on instructions that should get it

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4738 91177308-0d34-0410-b5e6-96231b3b80d8

Print is const!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4737 91177308-0d34-0410-b5e6-96231b3b80d8

Pass on a targetmachine

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4736 91177308-0d34-0410-b5e6-96231b3b80d8

Make sure that print gets a targetmachine
 CVS: ----------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4735 91177308-0d34-0410-b5e6-96231b3b80d8

Arrange to have a TargetMachine available in X86InstrInfo::print

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4734 91177308-0d34-0410-b5e6-96231b3b80d8

Omit the indirect node when printing call graphs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4733 91177308-0d34-0410-b5e6-96231b3b80d8