oota-llvm.git
9 years agoDataLayout: Be more verbose when diagnosing problems in pointer specs
David Majnemer [Wed, 10 Dec 2014 01:38:28 +0000 (01:38 +0000)]
DataLayout: Be more verbose when diagnosing problems in pointer specs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223903 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoI didn't intend to commit this with r223898
David Majnemer [Wed, 10 Dec 2014 01:17:48 +0000 (01:17 +0000)]
I didn't intend to commit this with r223898

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223899 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDataLayout: Move asserts over to report_fatal_error
David Majnemer [Wed, 10 Dec 2014 01:17:08 +0000 (01:17 +0000)]
DataLayout: Move asserts over to report_fatal_error

As indicated by the tests, it is possible to feed the AsmParser an
invalid datalayout string.  We should verify the result of parsing this
string regardless of whether or not we have assertions enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223898 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMachineVerifier: Allow physreg use if just a subreg is defined.
Matthias Braun [Wed, 10 Dec 2014 01:13:13 +0000 (01:13 +0000)]
MachineVerifier: Allow physreg use if just a subreg is defined.

We can't mark partially undefined registers, so we have to allow reading
a register in the machine verifier if just parts of a register are
defined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223896 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMachineVerifier: Allow LiveInterval segments to end at a partial write.
Matthias Braun [Wed, 10 Dec 2014 01:13:11 +0000 (01:13 +0000)]
MachineVerifier: Allow LiveInterval segments to end at a partial write.

In the subregister liveness tracking case we do not create implicit
reads on partial register writes anymore, still we need to produce a new
SSA value for partial writes so the live segment has to end.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223895 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoVirtRegMap: Improve block live-in info if subregister liveness is available.
Matthias Braun [Wed, 10 Dec 2014 01:13:08 +0000 (01:13 +0000)]
VirtRegMap: Improve block live-in info if subregister liveness is available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223894 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMCRegisterInfo: Add MCSubRegIndexIterator.
Matthias Braun [Wed, 10 Dec 2014 01:13:06 +0000 (01:13 +0000)]
MCRegisterInfo: Add MCSubRegIndexIterator.

This iterator iterates over subregister and their associated subregister indices
at the same time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223893 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoVirtRegMap: No implicit defs/uses for super registers with subreg liveness tracking.
Matthias Braun [Wed, 10 Dec 2014 01:13:04 +0000 (01:13 +0000)]
VirtRegMap: No implicit defs/uses for super registers with subreg liveness tracking.

Adding the implicit defs/uses to the superregisters is semantically questionable
but was not dangerous before as the register allocator never assigned the same
register to two overlapping LiveIntervals even when the actually live
subregisters do not overlap. With subregister liveness tracking enabled this
does actually happen and leads to subsequent bugs if we don't stop adding
the superregister defs/uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223892 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLiveRegMatrix: Respect subregister liveness when allocating registers.
Matthias Braun [Wed, 10 Dec 2014 01:13:01 +0000 (01:13 +0000)]
LiveRegMatrix: Respect subregister liveness when allocating registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223891 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLiveIntervalUnion: Allow specification of liverange when unifying/extracting.
Matthias Braun [Wed, 10 Dec 2014 01:12:59 +0000 (01:12 +0000)]
LiveIntervalUnion: Allow specification of liverange when unifying/extracting.

This allows it to add subregister ranges into the union.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223890 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTablegen'erate lanemasks for register units.
Matthias Braun [Wed, 10 Dec 2014 01:12:56 +0000 (01:12 +0000)]
Tablegen'erate lanemasks for register units.

Now we can relate lanemasks in a virtual register to register units.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223889 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRegisterCoalescer: Preserve subregister liveranges.
Matthias Braun [Wed, 10 Dec 2014 01:12:52 +0000 (01:12 +0000)]
RegisterCoalescer: Preserve subregister liveranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223888 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLiveInterval: Add removeEmptySubRanges().
Matthias Braun [Wed, 10 Dec 2014 01:12:40 +0000 (01:12 +0000)]
LiveInterval: Add removeEmptySubRanges().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223887 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLiveIntervalAnalysis: Add subregister aware variants pruneValue().
Matthias Braun [Wed, 10 Dec 2014 01:12:36 +0000 (01:12 +0000)]
LiveIntervalAnalysis: Add subregister aware variants pruneValue().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223886 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLiveInterval: Introduce LiveQuery accessor for dead or live out values.
Matthias Braun [Wed, 10 Dec 2014 01:12:33 +0000 (01:12 +0000)]
LiveInterval: Introduce LiveQuery accessor for dead or live out values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223885 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd a flag to enable/disable subregister liveness.
Matthias Braun [Wed, 10 Dec 2014 01:12:30 +0000 (01:12 +0000)]
Add a flag to enable/disable subregister liveness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223884 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLiveIntervalAnalysis: Adapt repairIntervalsInRange() to subregister liveness.
Matthias Braun [Wed, 10 Dec 2014 01:12:26 +0000 (01:12 +0000)]
LiveIntervalAnalysis: Adapt repairIntervalsInRange() to subregister liveness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223883 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLiveRangeEdit: Adapt eliminateDeadDef() to subregister liveness.
Matthias Braun [Wed, 10 Dec 2014 01:12:23 +0000 (01:12 +0000)]
LiveRangeEdit: Adapt eliminateDeadDef() to subregister liveness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223882 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLiveIntervalAnalysis: Adapt handleMove() to subregister ranges.
Matthias Braun [Wed, 10 Dec 2014 01:12:20 +0000 (01:12 +0000)]
LiveIntervalAnalysis: Adapt handleMove() to subregister ranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223881 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLiveIntervalAnalysis: Update SubRanges in shrinkToUses().
Matthias Braun [Wed, 10 Dec 2014 01:12:18 +0000 (01:12 +0000)]
LiveIntervalAnalysis: Update SubRanges in shrinkToUses().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223880 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLiveIntervalAnalysis: Make computeDeadValues() private.
Matthias Braun [Wed, 10 Dec 2014 01:12:15 +0000 (01:12 +0000)]
LiveIntervalAnalysis: Make computeDeadValues() private.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223879 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLiveIntervalAnalysis: Compute subregister ranges.
Matthias Braun [Wed, 10 Dec 2014 01:12:12 +0000 (01:12 +0000)]
LiveIntervalAnalysis: Compute subregister ranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223878 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLiveInterval: Add support to track liveness of subregisters.
Matthias Braun [Wed, 10 Dec 2014 01:12:10 +0000 (01:12 +0000)]
LiveInterval: Add support to track liveness of subregisters.

This code adds the required data structures. Algorithms to compute it follow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223877 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLiveInterval: Add a 'covers' operation to LiveRange.
Matthias Braun [Wed, 10 Dec 2014 01:12:06 +0000 (01:12 +0000)]
LiveInterval: Add a 'covers' operation to LiveRange.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223876 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLiveInterval: Add const version of LiveRange::advanceTo().
Matthias Braun [Wed, 10 Dec 2014 01:12:02 +0000 (01:12 +0000)]
LiveInterval: Add const version of LiveRange::advanceTo().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223875 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd function that translates subregister lane masks to other subregs.
Matthias Braun [Wed, 10 Dec 2014 01:12:00 +0000 (01:12 +0000)]
Add function that translates subregister lane masks to other subregs.

This works like the composeSubRegisterIndices() function but transforms
a subregister lane mask instead of a subregister index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223874 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLet tablegen compute maximum lanemask for regs/regclasses.
Matthias Braun [Wed, 10 Dec 2014 01:11:56 +0000 (01:11 +0000)]
Let tablegen compute maximum lanemask for regs/regclasses.

Let tablegen compute the combination of subregister lanemasks for all
subregisters in a register/register class. This is preparation for further
work subregister allocation

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223873 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAsmParser: Don't crash if a null byte is inside a quoted string
David Majnemer [Wed, 10 Dec 2014 00:43:17 +0000 (00:43 +0000)]
AsmParser: Don't crash if a null byte is inside a quoted string

We don't allow Value* to have names which contain null bytes.  The
AsmParser should reject .ll files that try to do this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223869 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoExtend some comments around GCModuleInfo, GCFunctionInfo, & GCStrategy
Philip Reames [Wed, 10 Dec 2014 00:30:11 +0000 (00:30 +0000)]
Extend some comments around GCModuleInfo, GCFunctionInfo, & GCStrategy

Nothing particularly interesting here, just documenting the way the code currently works before I start changing it...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223866 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agocmake: Make SVNVersion.inc work on Windows if svn is called svn.bat.
Nico Weber [Wed, 10 Dec 2014 00:10:21 +0000 (00:10 +0000)]
cmake: Make SVNVersion.inc work on Windows if svn is called svn.bat.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223864 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSimplify the handling of aliases in the gold plugin.
Rafael Espindola [Wed, 10 Dec 2014 00:09:35 +0000 (00:09 +0000)]
Simplify the handling of aliases in the gold plugin.

The complicated situation is when we have to keep an alias but drop a GV
that is part of the aliasee.

We used to clone the dropped GV and make the clone internal. This is wasteful
as we know the original will be dropped.

With this patch what is done instead is set the linkage of the original to
internal and replace all uses (but the one in the alias) with a new
declaration that takes the name of the old GV. This saves us from having
to copy the body.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223863 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ARM] Combine base-updating/post-incrementing vector load/stores.
Ahmed Bougacha [Wed, 10 Dec 2014 00:07:37 +0000 (00:07 +0000)]
[ARM] Combine base-updating/post-incrementing vector load/stores.

We used to only combine intrinsics, and turn them into VLD1_UPD/VST1_UPD
when the base pointer is incremented after the load/store.

We can do the same thing for generic load/stores.

Note that we can only combine the first load/store+adds pair in
a sequence (as might be generated for a v16f32 load for instance),
because other combines turn the base pointer addition chain (each
computing the address of the next load, from the address of the last
load) into independent additions (common base pointer + this load's
offset).

Differential Revision: http://reviews.llvm.org/D6585

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223862 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove the Module pointer from GCStrategy and GCMetadataPrinter
Philip Reames [Tue, 9 Dec 2014 23:57:54 +0000 (23:57 +0000)]
Remove the Module pointer from GCStrategy and GCMetadataPrinter

In the current implementation, GCStrategy is a part of the ownership structure for the gc metadata which describes a Module. It also contains a reference to the module in question. As a result, GCStrategy instances are essentially Module specific.

I plan to transition away from this design. Instead, a GCStrategy will be owned by the LLVMContext. It will be a lightweight policy object which contains no information about the Modules or Functions involved, but can be easily reached given a Function.

The first step in this transition is to remove the direct Module reference from GCStrategy. This also requires removing the single user of this reference, the GCMetadataPrinter hierarchy. In theory, this will allow the lifetime of the printers to be scoped to the LLVMContext as well, but in practice, I'm not actually changing that. (Yet?)

An alternate design would have been to move the direct Module reference into the GCMetadataPrinter and change the keying of the owning maps to explicitly key off both GCStrategy and Module. I'm open to doing it that way instead, but didn't see much value in preserving the per Module association for GCMetadataPrinters.

The next change in this sequence will be to start unwinding the intertwined ownership between GCStrategy, GCModuleInfo, and GCFunctionInfo.

Differential Revision: http://reviews.llvm.org/D6566

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223859 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoIR: Fix memory corruption in MDNode new/delete
Duncan P. N. Exon Smith [Tue, 9 Dec 2014 23:56:39 +0000 (23:56 +0000)]
IR: Fix memory corruption in MDNode new/delete

There were two major problems with `MDNode` memory management.

 1. `MDNode::operator new()` called a placement array constructor for
    `MDOperand`.  What?  Each operand needs to be placed individually.

 2. `MDNode::operator delete()` failed to destruct the `MDOperand`s at
    all.

Frankly it's hard to understand how this worked locally, how this
survived an LTO bootstrap, or how it worked on most of the bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223858 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoForgot to add test for r223856
David Majnemer [Tue, 9 Dec 2014 23:51:14 +0000 (23:51 +0000)]
Forgot to add test for r223856

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223857 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAsmParser: Verifier that the contents of a hex integer are hex
David Majnemer [Tue, 9 Dec 2014 23:50:38 +0000 (23:50 +0000)]
AsmParser: Verifier that the contents of a hex integer are hex

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223856 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRename static functiom "map" to be more descriptive and to avoid
Kaelyn Takata [Tue, 9 Dec 2014 23:32:46 +0000 (23:32 +0000)]
Rename static functiom "map" to be more descriptive and to avoid
potential confusion with the std::map type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223853 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoIR: Metadata: Detect an RAUW recursion
Duncan P. N. Exon Smith [Tue, 9 Dec 2014 23:04:59 +0000 (23:04 +0000)]
IR: Metadata: Detect an RAUW recursion

Speculatively handle a recursion in
`GenericMDNode::handleChangedOperand()`.  I'm hoping this fixes the
failing hexagon bot [1].

[1]: http://lab.llvm.org:8011/builders/llvm-hexagon-elf/builds/13434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223849 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove redundant variable.
Michael Zolotukhin [Tue, 9 Dec 2014 22:45:07 +0000 (22:45 +0000)]
Remove redundant variable.

Tested by adding assert(LoopVectorPreHeader == VecPreheader) on LLVM
test suite and SPECs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223847 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] [NFC] Cleaning up unused classes.
Colin LeMahieu [Tue, 9 Dec 2014 22:33:26 +0000 (22:33 +0000)]
[Hexagon] [NFC] Cleaning up unused classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223845 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ARM] Make testcase more explicit. NFC.
Ahmed Bougacha [Tue, 9 Dec 2014 22:08:57 +0000 (22:08 +0000)]
[ARM] Make testcase more explicit. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223841 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ARM] Factor out base-updating VLD/VST combiner function. NFC.
Ahmed Bougacha [Tue, 9 Dec 2014 21:30:00 +0000 (21:30 +0000)]
[ARM] Factor out base-updating VLD/VST combiner function. NFC.

Move the combiner-state check into another function, add a few
small comments, and use a more general type in a cast<>.

In preparation for a future patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223834 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ARM] Move the store combiner function down. NFC.
Ahmed Bougacha [Tue, 9 Dec 2014 21:26:53 +0000 (21:26 +0000)]
[ARM] Move the store combiner function down. NFC.

And flip its final condition.
In preparation for a future patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223833 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ARM] Also support v2f64 vld1/vst1.
Ahmed Bougacha [Tue, 9 Dec 2014 21:25:00 +0000 (21:25 +0000)]
[ARM] Also support v2f64 vld1/vst1.

It was missing from the VLD1/VST1 handling logic, even though the
corresponding instructions exist (same form as v2i64).

In preparation for a future patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223832 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoIR: Metadata/Value split: RAUW in a deterministic order
Duncan P. N. Exon Smith [Tue, 9 Dec 2014 21:12:56 +0000 (21:12 +0000)]
IR: Metadata/Value split: RAUW in a deterministic order

RAUW in a deterministic order to try to recover the hexagon bot [1],
whose tests started failing once my GCC fixes were in for r223802.

Otherwise, I'm not sure why tests would fail there and not here.

[1]: http://lab.llvm.org:8011/builders/llvm-hexagon-elf/builds/13426

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223829 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReturn ErrorOr<std::unique_ptr<Archive>> form getAsArchive.
Rafael Espindola [Tue, 9 Dec 2014 21:05:36 +0000 (21:05 +0000)]
Return ErrorOr<std::unique_ptr<Archive>> form getAsArchive.

This is the same return type of Archive::create.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223827 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTry fixing MSVC build after r223802
Hans Wennborg [Tue, 9 Dec 2014 20:39:15 +0000 (20:39 +0000)]
Try fixing MSVC build after r223802

LLVM_EXPLICIT is only supported by recent version of MSVC, and it seems
the not-so-recent versions get confused about the operator bool() when
tryint to resolve operator== calls.

This removed the operator bool()'s since they don't seem to be used
anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223824 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Fixing broken tests.
Colin LeMahieu [Tue, 9 Dec 2014 20:36:53 +0000 (20:36 +0000)]
[Hexagon] Fixing broken tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223823 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRename createIRObjectFile to just create.
Rafael Espindola [Tue, 9 Dec 2014 20:36:13 +0000 (20:36 +0000)]
Rename createIRObjectFile to just create.

It is a static method of IRObjectFile, so having to use
IRObjectFile::createIRObjectFile was redundant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223822 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
Colin LeMahieu [Tue, 9 Dec 2014 20:23:30 +0000 (20:23 +0000)]
[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223821 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix an MSVC failure from r223802
Duncan P. N. Exon Smith [Tue, 9 Dec 2014 20:01:40 +0000 (20:01 +0000)]
Fix an MSVC failure from r223802

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223820 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[FastISel][AArch64] Fix a missing nullptr check in 'computeAddress'.
Juergen Ributzka [Tue, 9 Dec 2014 19:44:38 +0000 (19:44 +0000)]
[FastISel][AArch64] Fix a missing nullptr check in 'computeAddress'.

The load/store value type is currently not available when lowering the memcpy
intrinsic. Add the missing nullptr check to support this in 'computeAddress'.

Fixes rdar://problem/19178947.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223818 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Adding word combine dot-new form and replacing old combine opcode.
Colin LeMahieu [Tue, 9 Dec 2014 19:23:45 +0000 (19:23 +0000)]
[Hexagon] Adding word combine dot-new form and replacing old combine opcode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223815 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert r223764 which taught instcombine about integer-based elment extraction
Chandler Carruth [Tue, 9 Dec 2014 19:21:16 +0000 (19:21 +0000)]
Revert r223764 which taught instcombine about integer-based elment extraction
patterns.

This is causing Clang to miscompile itself for 32-bit x86 somehow, and likely
also on ARM and PPC. I really don't know how, but reverting now that I've
confirmed this is actually the culprit. I have a reproduction as well and so
should be able to restore this shortly.

This reverts commit r223764.

Original commit log follows:
Teach instcombine to canonicalize "element extraction" from a load of an
integer and "element insertion" into a store of an integer into actual
element extraction, element insertion, and vector loads and stores.

Previously various parts of LLVM (including instcombine itself) would
introduce integer loads and stores into the code as a way of opaquely
loading and storing "bits". In some cases (such as a memcpy of
std::complex<float> object) we will eventually end up using those bits
in non-integer types. In order for SROA to effectively promote the
allocas involved, it splits these "store a bag of bits" integer loads
and stores up into the constituent parts. However, for non-alloca loads
and tsores which remain, it uses integer math to recombine the values
into a large integer to load or store.

All of this would be "fine", except that it forces LLVM to go through
integer math to combine and split up values. While this makes perfect
sense for integers (and in fact is critical for bitfields to end up
lowering efficiently) it is *terrible* for non-integer types, especially
floating point types. We have a much more canonical way of representing
the act of concatenating the bits of two SSA values in LLVM: a vector
and insertelement. This patch teaching InstCombine to use this
representation.

With this patch applied, LLVM will no longer introduce integer math into
the critical path of every loop over std::complex<float> operations such
as those that make up the hot path of ... oh, most HPC code, Eigen, and
any other heavy linear algebra library.

For the record, I looked *extensively* at fixing this in other parts of
the compiler, but it just doesn't work:
- We really do want to canonicalize memcpy and other bit-motion to
  integer loads and stores. SSA values are tremendously more powerful
  than "copy" intrinsics. Not doing this regresses massive amounts of
  LLVM's scalar optimizer.
- We really do need to split up integer loads and stores of this form in
  SROA or every memcpy of a trivially copyable struct will prevent SSA
  formation of the members of that struct. It essentially turns off
  SROA.
- The closest alternative is to actually split the loads and stores when
  partitioning with SROA, but this has all of the downsides historically
  discussed of splitting up loads and stores -- the wide-store
  information is fundamentally lost. We would also see performance
  regressions for bitfield-heavy code and other places where the
  integers aren't really intended to be split without seemingly
  arbitrary logic to treat integers totally differently.
- We *can* effectively fix this in instcombine, so it isn't that hard of
  a choice to make IMO.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223813 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAsmParser: Don't crash on short hex constants for fp128 types
David Majnemer [Tue, 9 Dec 2014 19:10:03 +0000 (19:10 +0000)]
AsmParser: Don't crash on short hex constants for fp128 types

If we see 0xL01, treat it like 0xL00000000000000000000000000000001
instead of crashing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223811 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix another GCC build failure from r223802
Duncan P. N. Exon Smith [Tue, 9 Dec 2014 18:59:09 +0000 (18:59 +0000)]
Fix another GCC build failure from r223802

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223810 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove unneeded curly braces.
Frederic Riss [Tue, 9 Dec 2014 18:57:39 +0000 (18:57 +0000)]
Remove unneeded curly braces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223809 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReorder the code to avoid inserting at the beginning of a vector.
Frederic Riss [Tue, 9 Dec 2014 18:57:34 +0000 (18:57 +0000)]
Reorder the code to avoid inserting at the beginning of a vector.

As per dblaikie suggestion, thanks\!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223808 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoCleanup PatternMatch. NFC.
Juergen Ributzka [Tue, 9 Dec 2014 18:56:35 +0000 (18:56 +0000)]
Cleanup PatternMatch. NFC.

Tidy up the code a little by using 'auto' when the type is obvious, doxify the
comments, and clang-format the file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223807 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix a GCC build failure from r223802
Duncan P. N. Exon Smith [Tue, 9 Dec 2014 18:52:38 +0000 (18:52 +0000)]
Fix a GCC build failure from r223802

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223806 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdding a new option to CMake to disable C++ atexit on llvm-shlib.
Chris Bieneman [Tue, 9 Dec 2014 18:49:55 +0000 (18:49 +0000)]
Adding a new option to CMake to disable C++ atexit on llvm-shlib.

Summary:
This is desirable for WebKit and other clients of the llvm-shlib because C++ exit time destructors have a tendency to crash when invoked from multi-threaded applications.

Ideally this option will be temporary, because the ideal fix is to just not have exit time destructors.

Reviewers: chapuni, ributzka

Reviewed By: ributzka

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6572

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223805 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[AVX512] Added lowering for VBROADCASTSS/SD instructions.
Robert Khasanov [Tue, 9 Dec 2014 18:45:30 +0000 (18:45 +0000)]
[AVX512] Added lowering for VBROADCASTSS/SD instructions.
Lowering patterns were written through avx512_broadcast_pat multiclass as pattern generates VBROADCAST and COPY_TO_REGCLASS nodes.
Added lowering tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223804 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoIR: Split Metadata from Value
Duncan P. N. Exon Smith [Tue, 9 Dec 2014 18:38:53 +0000 (18:38 +0000)]
IR: Split Metadata from Value

Split `Metadata` away from the `Value` class hierarchy, as part of
PR21532.  Assembly and bitcode changes are in the wings, but this is the
bulk of the change for the IR C++ API.

I have a follow-up patch prepared for `clang`.  If this breaks other
sub-projects, I apologize in advance :(.  Help me compile it on Darwin
I'll try to fix it.  FWIW, the errors should be easy to fix, so it may
be simpler to just fix it yourself.

This breaks the build for all metadata-related code that's out-of-tree.
Rest assured the transition is mechanical and the compiler should catch
almost all of the problems.

Here's a quick guide for updating your code:

  - `Metadata` is the root of a class hierarchy with three main classes:
    `MDNode`, `MDString`, and `ValueAsMetadata`.  It is distinct from
    the `Value` class hierarchy.  It is typeless -- i.e., instances do
    *not* have a `Type`.

  - `MDNode`'s operands are all `Metadata *` (instead of `Value *`).

  - `TrackingVH<MDNode>` and `WeakVH` referring to metadata can be
    replaced with `TrackingMDNodeRef` and `TrackingMDRef`, respectively.

    If you're referring solely to resolved `MDNode`s -- post graph
    construction -- just use `MDNode*`.

  - `MDNode` (and the rest of `Metadata`) have only limited support for
    `replaceAllUsesWith()`.

    As long as an `MDNode` is pointing at a forward declaration -- the
    result of `MDNode::getTemporary()` -- it maintains a side map of its
    uses and can RAUW itself.  Once the forward declarations are fully
    resolved RAUW support is dropped on the ground.  This means that
    uniquing collisions on changing operands cause nodes to become
    "distinct".  (This already happened fairly commonly, whenever an
    operand went to null.)

    If you're constructing complex (non self-reference) `MDNode` cycles,
    you need to call `MDNode::resolveCycles()` on each node (or on a
    top-level node that somehow references all of the nodes).  Also,
    don't do that.  Metadata cycles (and the RAUW machinery needed to
    construct them) are expensive.

  - An `MDNode` can only refer to a `Constant` through a bridge called
    `ConstantAsMetadata` (one of the subclasses of `ValueAsMetadata`).

    As a side effect, accessing an operand of an `MDNode` that is known
    to be, e.g., `ConstantInt`, takes three steps: first, cast from
    `Metadata` to `ConstantAsMetadata`; second, extract the `Constant`;
    third, cast down to `ConstantInt`.

    The eventual goal is to introduce `MDInt`/`MDFloat`/etc. and have
    metadata schema owners transition away from using `Constant`s when
    the type isn't important (and they don't care about referring to
    `GlobalValue`s).

    In the meantime, I've added transitional API to the `mdconst`
    namespace that matches semantics with the old code, in order to
    avoid adding the error-prone three-step equivalent to every call
    site.  If your old code was:

        MDNode *N = foo();
        bar(isa             <ConstantInt>(N->getOperand(0)));
        baz(cast            <ConstantInt>(N->getOperand(1)));
        bak(cast_or_null    <ConstantInt>(N->getOperand(2)));
        bat(dyn_cast        <ConstantInt>(N->getOperand(3)));
        bay(dyn_cast_or_null<ConstantInt>(N->getOperand(4)));

    you can trivially match its semantics with:

        MDNode *N = foo();
        bar(mdconst::hasa               <ConstantInt>(N->getOperand(0)));
        baz(mdconst::extract            <ConstantInt>(N->getOperand(1)));
        bak(mdconst::extract_or_null    <ConstantInt>(N->getOperand(2)));
        bat(mdconst::dyn_extract        <ConstantInt>(N->getOperand(3)));
        bay(mdconst::dyn_extract_or_null<ConstantInt>(N->getOperand(4)));

    and when you transition your metadata schema to `MDInt`:

        MDNode *N = foo();
        bar(isa             <MDInt>(N->getOperand(0)));
        baz(cast            <MDInt>(N->getOperand(1)));
        bak(cast_or_null    <MDInt>(N->getOperand(2)));
        bat(dyn_cast        <MDInt>(N->getOperand(3)));
        bay(dyn_cast_or_null<MDInt>(N->getOperand(4)));

  - A `CallInst` -- specifically, intrinsic instructions -- can refer to
    metadata through a bridge called `MetadataAsValue`.  This is a
    subclass of `Value` where `getType()->isMetadataTy()`.

    `MetadataAsValue` is the *only* class that can legally refer to a
    `LocalAsMetadata`, which is a bridged form of non-`Constant` values
    like `Argument` and `Instruction`.  It can also refer to any other
    `Metadata` subclass.

(I'll break all your testcases in a follow-up commit, when I propagate
this change to assembly.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223802 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAsmParser: Don't crash on malformed attribute groups
David Majnemer [Tue, 9 Dec 2014 18:33:57 +0000 (18:33 +0000)]
AsmParser: Don't crash on malformed attribute groups

This fixes PR21785.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223801 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Updating predicate register transfers and adding tstbit to allow select...
Colin LeMahieu [Tue, 9 Dec 2014 18:16:49 +0000 (18:16 +0000)]
[Hexagon] Updating predicate register transfers and adding tstbit to allow select selection.  Updating ll tests with predicate transfers that previously had nop encodings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223800 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoCorrectly handle complex locations expressions in replaceDbgDeclareForAlloca()
Frederic Riss [Tue, 9 Dec 2014 17:55:48 +0000 (17:55 +0000)]
Correctly handle complex locations expressions in replaceDbgDeclareForAlloca()

replaceDbgDeclareForAlloca() replaces an alloca by a value storing the
address of what was the alloca. If there is a dbg.declare corresponding
to that alloca, we need to lower it to a dbg.value describing the additional
dereference operation to be performed to get to the underlying variable.
 This is done by adding a DW_OP_deref to the complex location part of the
location description. This deref was added to the end of the operation list,
which is wrong. The expression applies to what is described by the
dbg.{declare,value}, and as we are changing this, we need to apply the
DW_OP_deref as the first operation in the list.

Part of the fix for rdar://19162268.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223799 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDeleting empty directories left over from r223794.
Frederic Riss [Tue, 9 Dec 2014 17:50:27 +0000 (17:50 +0000)]
Deleting empty directories left over from r223794.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223798 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[CGP] Rewrite pattern match for splitBranchCondition to work with Values instead.
Juergen Ributzka [Tue, 9 Dec 2014 17:50:10 +0000 (17:50 +0000)]
[CGP] Rewrite pattern match for splitBranchCondition to work with Values instead.

Rewrite the pattern match code to work also with Values instead with
Instructions only. Also remove the no longer need matcher (m_Instruction).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223797 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "Move function to obtain branch weights into the BranchInst class. NFC."
Juergen Ributzka [Tue, 9 Dec 2014 17:32:12 +0000 (17:32 +0000)]
Revert "Move function to obtain branch weights into the BranchInst class. NFC."

This reverts commit r223784 and copies the 'ExtractBranchMetadata' to CodeGenPrepare.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223795 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "Initial dsymutil tool commit."
Frederic Riss [Tue, 9 Dec 2014 17:21:50 +0000 (17:21 +0000)]
Revert "Initial dsymutil tool commit."

This reverts commit r223793. The review thread wasn't concluded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223794 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoInitial dsymutil tool commit.
Frederic Riss [Tue, 9 Dec 2014 17:03:30 +0000 (17:03 +0000)]
Initial dsymutil tool commit.

The goal of this tool is to replicate Darwin's dsymutil functionality
based on LLVM. dsymutil is a DWARF linker. Darwin's linker (ld64) does
not link the debug information, it leaves it in the object files in
relocatable form, but embbeds a `debug map` into the executable that
describes where to find the debug information and how to relocate it.
When releasing/archiving a binary, dsymutil is called to link all the DWARF
information into a `dsym bundle` that can distributed/stored along with
the binary.

With this commit, the LLVM based dsymutil is just able to parse the STABS
debug maps embedded by ld64 in linked binaries (and not all of them, for
example archives aren't supported yet).

Note that the tool directory is called dsymutil, but the executable is
currently called llvm-dsymutil. This discrepancy will disappear once the
tool will be feature complete. At this point the executable will be renamed
to dsymutil, but until then you do not want it to override the system one.

    Differential Revision: http://reviews.llvm.org/D6242

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223793 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[PowerPC 4/4] Enable little-endian support for VSX.
Bill Schmidt [Tue, 9 Dec 2014 16:59:57 +0000 (16:59 +0000)]
[PowerPC 4/4] Enable little-endian support for VSX.

With the foregoing three patches, VSX instructions can be used for
little endian.  This patch removes the restriction that prevented
this, and re-enables the test cases from the first three patches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223792 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[PowerPC 3/4] Little-endian adjustments for VSX vector shuffle
Bill Schmidt [Tue, 9 Dec 2014 16:52:29 +0000 (16:52 +0000)]
[PowerPC 3/4] Little-endian adjustments for VSX vector shuffle

When performing instruction selection for ISD::VECTOR_SHUFFLE, there
is special code for handling v2f64 and v2i64 using VSX instructions.
This code must be adjusted for little-endian.  Because the two inputs
are treated as a double-wide register, we must swap their order for
little endian.  To get the appropriate mask elements to use with the
big-endian biased XXPERMDI instruction, we must reverse their order
and invert the bits.

A new test is added to test the 16 possible values of the shuffle
mask.  It is initially disabled for reasons specified in the test.  It
is re-enabled by patch 4/4.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223791 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemember the unmangled name in the plugin.
Rafael Espindola [Tue, 9 Dec 2014 16:50:57 +0000 (16:50 +0000)]
Remember the unmangled name in the plugin.

This allows it to work with non trivial manglings like the one in COFF.

Amusingly, this can be tested with gold, as emit-llvm causes the plugin to
exit before any COFF is generated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223790 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd test cases that were inadvertently omitted from r223783 and r223788
Bill Schmidt [Tue, 9 Dec 2014 16:44:58 +0000 (16:44 +0000)]
Add test cases that were inadvertently omitted from r223783 and r223788

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223789 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[PowerPC 2/4] Little-endian adjustments for VSX insert/extract operations
Bill Schmidt [Tue, 9 Dec 2014 16:43:32 +0000 (16:43 +0000)]
[PowerPC 2/4] Little-endian adjustments for VSX insert/extract operations

For little endian, we need to make some straightforward adjustments in
the code expansions for scalar_to_vector and vector_extract of v2f64.
First, scalar_to_vector must place the scalar into vector element
zero.  However, our implementation of SUBREG_TO_REG will place it into
big-element vector element zero (high-order bits), and for little
endian we need it in the low-order bits.  The LE implementation splats
the high-order doubleword into the low-order doubleword.

Second, the meaning of (vector_extract x, 0) and (vector_extract x, 1)
must be reversed for similar reasons.

A new test is added that tests code generation for insertelement and
extractelement for both element 0 and element 1.  It is disabled in
this patch but enabled in patch 4/4, for reasons stated in the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223788 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[AVX512] Added VPBROADCAST{BWDQ} (Load with Broadcast Integer Data from General Purpo...
Robert Khasanov [Tue, 9 Dec 2014 16:38:41 +0000 (16:38 +0000)]
[AVX512] Added VPBROADCAST{BWDQ} (Load with Broadcast Integer Data from General Purpose Register) encodings for AVX512-BW/VL subsets
Added encoding tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223787 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[CodeGenPrepare] Split branch conditions into multiple conditional branches.
Juergen Ributzka [Tue, 9 Dec 2014 16:36:13 +0000 (16:36 +0000)]
[CodeGenPrepare] Split branch conditions into multiple conditional branches.

This optimization transforms code like:
bb1:
  %0 = icmp ne i32 %a, 0
  %1 = icmp ne i32 %b, 0
  %or.cond = or i1 %0, %1
  br i1 %or.cond, label %TrueBB, label %FalseBB

into a multiple branch instructions like:

bb1:
  %0 = icmp ne i32 %a, 0
  br i1 %0, label %TrueBB, label %bb2
bb2:
  %1 = icmp ne i32 %b, 0
  br i1 %1, label %TrueBB, label %FalseBB

This optimization is already performed by SelectionDAG, but not by FastISel.
FastISel cannot perform this optimization, because it cannot generate new
MachineBasicBlocks.

Performing this optimization at CodeGenPrepare time makes it available to both -
SelectionDAG and FastISel - and the implementation in SelectiuonDAG could be
removed. There are currenty a few differences in codegen for X86 and PPC, so
this commmit only enables it for FastISel.

Reviewed by Jim Grosbach

This fixes rdar://problem/19034919.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223786 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd more pattern matchers for compares, instructions, and BinaryOperators. NFC.
Juergen Ributzka [Tue, 9 Dec 2014 16:36:10 +0000 (16:36 +0000)]
Add more pattern matchers for compares, instructions, and BinaryOperators. NFC.

Add a few more matchers to make the code in the next commit more compact.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223785 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMove function to obtain branch weights into the BranchInst class. NFC.
Juergen Ributzka [Tue, 9 Dec 2014 16:36:06 +0000 (16:36 +0000)]
Move function to obtain branch weights into the BranchInst class. NFC.

Make this function available to other parts of LLVM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223784 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[PowerPC 1/4] Little-endian adjustments for VSX loads/stores
Bill Schmidt [Tue, 9 Dec 2014 16:35:51 +0000 (16:35 +0000)]
[PowerPC 1/4] Little-endian adjustments for VSX loads/stores

This patch addresses the inherent big-endian bias in the lxvd2x,
lxvw4x, stxvd2x, and stxvw4x instructions.  These instructions load
vector elements into registers left-to-right (with the first element
loaded into the high-order bits of the register), regardless of the
endian setting of the processor.  However, these are the only
vector memory instructions that permit unaligned storage accesses, so
we want to use them for little-endian.

To make this work, a lxvd2x or lxvw4x is replaced with an lxvd2x
followed by an xxswapd, which swaps the doublewords.  This works for
lxvw4x as well as lxvd2x, because for lxvw4x on an LE system the
vector elements are in LE order (right-to-left) within each
doubleword.  (Thus after lxvw2x of a <4 x float> the elements will
appear as 1, 0, 3, 2.  Following the swap, they will appear as 3, 2,
0, 1, as desired.)   For stores, an stxvd2x or stxvw4x is replaced
with an stxvd2x preceded by an xxswapd.

Introduction of extra swap instructions provides correctness, but
obviously is not ideal from a performance perspective.  Future patches
will address this with optimizations to remove most of the introduced
swaps, which have proven effective in other implementations.

The introduction of the swaps is performed during lowering of LOAD,
STORE, INTRINSIC_W_CHAIN, and INTRINSIC_VOID operations.  The latter
are used to translate intrinsics that specify the VSX loads and stores
directly into equivalent sequences for little endian.  Thus code that
uses vec_vsx_ld and vec_vsx_st does not have to be modified to be
ported from BE to LE.

We introduce new PPCISD opcodes for LXVD2X, STXVD2X, and XXSWAPD for
use during this lowering step.  In PPCInstrVSX.td, we add new SDType
and SDNode definitions for these (PPClxvd2x, PPCstxvd2x, PPCxxswapd).
These are recognized during instruction selection and mapped to the
correct instructions.

Several tests that were written to use -mcpu=pwr7 or pwr8 are modified
to disable VSX on LE variants because code generation changes with
this and subsequent patches in this set.  I chose to include all of
these in the first patch than try to rigorously sort out which tests
were broken by one or another of the patches.  Sorry about that.

The new test vsx-ldst-builtin-le.ll, and the changes to vsx-ldst.ll,
are disabled until LE support is enabled because of breakages that
occur as noted in those tests.  They are re-enabled in patch 4/4.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223783 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMove method out of line to make buildbot happy.
Rafael Espindola [Tue, 9 Dec 2014 16:18:11 +0000 (16:18 +0000)]
Move method out of line to make buildbot happy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223781 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDon't lookup an object symbol name in the module.
Rafael Espindola [Tue, 9 Dec 2014 16:13:59 +0000 (16:13 +0000)]
Don't lookup an object symbol name in the module.

Instead, walk the obj symbol list in parallel to find the GV. This shouldn't
change anything on ELF where global symbols are not mangled, but it is a step
toward supporting other object formats.

Gold itself is ELF only, but bfd ld supports COFF and the logic in the gold
plugin could be reused on lld.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223780 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[x86] Fix the test to actually test things for the CPU names, add the
Chandler Carruth [Tue, 9 Dec 2014 14:25:55 +0000 (14:25 +0000)]
[x86] Fix the test to actually test things for the CPU names, add the
missing barcelona CPU which that test uncovered, and remove the 32-bit
x86 CPUs which I really wasn't prepared to audit and test thoroughly.

If anyone wants to clean up the 32-bit only x86 CPUs, go for it.

Also, if anyone else wants to try to de-duplicate the AMD CPUs, that'd
be cool, but from the looks of it wouldn't save as much as it did for
the Intel CPUs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223774 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemoving an unused variable to silence a -Wunused-but-set-variable warning. NFC.
Aaron Ballman [Tue, 9 Dec 2014 13:20:11 +0000 (13:20 +0000)]
Removing an unused variable to silence a -Wunused-but-set-variable warning. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223773 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix modified immediate bug reported by MC Hammer.
Asiri Rathnayake [Tue, 9 Dec 2014 13:14:58 +0000 (13:14 +0000)]
Fix modified immediate bug reported by MC Hammer.

Instructions of the form [ADD Rd, pc, #imm] are manually aliased
in processInstruction() to use ADR. To accomodate this, mod_imm handling
had to be tweaked a bit. Turns out it was the manual aliasing that must
be tweaked to accommodate mod_imms instead. More information about the
parsed instruction is available at the point where processInstruction()
is invoked, which makes it easier to detect a mod_imm at that point rather
than trying to detect a potential alias when a mod_imm is being prepped.
Added a test case and fixed some white spaces as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223772 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[x86] Add a test for the CPU names that should have been in r223769.
Chandler Carruth [Tue, 9 Dec 2014 11:19:57 +0000 (11:19 +0000)]
[x86] Add a test for the CPU names that should have been in r223769.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223770 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[x86] Bring some sanity to the x86 CPU processor definitions.
Chandler Carruth [Tue, 9 Dec 2014 10:58:36 +0000 (10:58 +0000)]
[x86] Bring some sanity to the x86 CPU processor definitions.

Notably, this adds simple micro-architecture names for the Intel CPU
variants, and defines the old 'core'-based names as aliases. GCC has
started to simplify their documented interface to use these names as
well, so it seems like we can start to converge on a consistent pattern.

I'd appreciate Intel double checking the entries that aren't yet
documented widely, especially Atom (Bonnell and Silvermont), Knights
Landing, and Skylake. But this change shouldn't break any existing
users.

Also, ran clang-format to re-format this code and it actually worked
(modulo a tiny bug) so hopefully we can start to stop thinking about
formatting this stuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223769 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemoval Of Duplicate Test Cases and Addition Of Missing Check Statements
Sonam Kumari [Tue, 9 Dec 2014 10:46:38 +0000 (10:46 +0000)]
Removal Of Duplicate Test Cases and Addition Of Missing Check Statements

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223768 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[test/Transforms/InstCombine/shift.ll] Removed duplicate test cases. NFC.
Ankur Garg [Tue, 9 Dec 2014 10:35:19 +0000 (10:35 +0000)]
[test/Transforms/InstCombine/shift.ll] Removed duplicate test cases. NFC.

Removed some duplicate test cases from the file /test/Transforms/InstCombine/shift.ll.

test54 and test57 were duplicates of each other.
test55 and test58 were duplicates of each other.

(Removed test57 and test58)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223767 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoImprove emacs coding style
Will Newton [Tue, 9 Dec 2014 08:58:31 +0000 (08:58 +0000)]
Improve emacs coding style

Remove setting of default style, this way is not recommended and
means that all the settings have to be duplicated to demonstrate the
c-add-style method which is a much better way of doing it.

Remove the modified date as it is better stored in SVN.

Tweak a few style parameters to make them conform to the actual LLVM
style.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223765 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTeach instcombine to canonicalize "element extraction" from a load of an
Chandler Carruth [Tue, 9 Dec 2014 08:55:32 +0000 (08:55 +0000)]
Teach instcombine to canonicalize "element extraction" from a load of an
integer and "element insertion" into a store of an integer into actual
element extraction, element insertion, and vector loads and stores.

Previously various parts of LLVM (including instcombine itself) would
introduce integer loads and stores into the code as a way of opaquely
loading and storing "bits". In some cases (such as a memcpy of
std::complex<float> object) we will eventually end up using those bits
in non-integer types. In order for SROA to effectively promote the
allocas involved, it splits these "store a bag of bits" integer loads
and stores up into the constituent parts. However, for non-alloca loads
and tsores which remain, it uses integer math to recombine the values
into a large integer to load or store.

All of this would be "fine", except that it forces LLVM to go through
integer math to combine and split up values. While this makes perfect
sense for integers (and in fact is critical for bitfields to end up
lowering efficiently) it is *terrible* for non-integer types, especially
floating point types. We have a much more canonical way of representing
the act of concatenating the bits of two SSA values in LLVM: a vector
and insertelement. This patch teaching InstCombine to use this
representation.

With this patch applied, LLVM will no longer introduce integer math into
the critical path of every loop over std::complex<float> operations such
as those that make up the hot path of ... oh, most HPC code, Eigen, and
any other heavy linear algebra library.

For the record, I looked *extensively* at fixing this in other parts of
the compiler, but it just doesn't work:
- We really do want to canonicalize memcpy and other bit-motion to
  integer loads and stores. SSA values are tremendously more powerful
  than "copy" intrinsics. Not doing this regresses massive amounts of
  LLVM's scalar optimizer.
- We really do need to split up integer loads and stores of this form in
  SROA or every memcpy of a trivially copyable struct will prevent SSA
  formation of the members of that struct. It essentially turns off
  SROA.
- The closest alternative is to actually split the loads and stores when
  partitioning with SROA, but this has all of the downsides historically
  discussed of splitting up loads and stores -- the wide-store
  information is fundamentally lost. We would also see performance
  regressions for bitfield-heavy code and other places where the
  integers aren't really intended to be split without seemingly
  arbitrary logic to treat integers totally differently.
- We *can* effectively fix this in instcombine, so it isn't that hard of
  a choice to make IMO.

Differential Revision: http://reviews.llvm.org/D6548

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223764 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSkip declarations in the case of functions.
Michael Ilseman [Tue, 9 Dec 2014 08:20:06 +0000 (08:20 +0000)]
Skip declarations in the case of functions.

This is a revert of r223521 in spirit, if not in content. I am not
sure why declarations ended up in LazilyLinkGlobalValues in the first
place; that will take some more investigation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223763 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUse range-based for loops. NFC.
Craig Topper [Tue, 9 Dec 2014 08:05:51 +0000 (08:05 +0000)]
Use range-based for loops. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223762 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAVX-512: Added some comments to ERI scalar intrinsics.
Elena Demikhovsky [Tue, 9 Dec 2014 07:06:32 +0000 (07:06 +0000)]
AVX-512: Added some comments to ERI scalar intrinsics.
No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223761 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix a few instances found in SelectionDAG where we were not handling F16 at parity...
Owen Anderson [Tue, 9 Dec 2014 06:50:39 +0000 (06:50 +0000)]
Fix a few instances found in SelectionDAG where we were not handling F16 at parity with F32 and F64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223760 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agotest commit (spelling correction)
Mohit K. Bhakkad [Tue, 9 Dec 2014 06:31:07 +0000 (06:31 +0000)]
test commit (spelling correction)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223758 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86] Convert esp-relative movs of function arguments into pushes, step 1
Michael Kuperstein [Tue, 9 Dec 2014 06:10:44 +0000 (06:10 +0000)]
[X86] Convert esp-relative movs of function arguments into pushes, step 1

This handles the simplest case for mov -> push conversion:
1. x86-32 calling convention, everything is passed through the stack.
2. There is no reserved call frame.
3. Only registers or immediates are pushed, no attempt to combine a mem-reg-mem sequence into a single PUSHmm.

Differential Revision: http://reviews.llvm.org/D6503

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223757 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReland r223754
David Majnemer [Tue, 9 Dec 2014 05:56:09 +0000 (05:56 +0000)]
Reland r223754

The commit is identical except a reference to `GV' should have been to
`GVal'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223756 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "AsmParser: Reject invalid mismatch between forward ref and def"
David Majnemer [Tue, 9 Dec 2014 05:50:11 +0000 (05:50 +0000)]
Revert "AsmParser: Reject invalid mismatch between forward ref and def"

This reverts commit r223754.  I've upset the buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223755 91177308-0d34-0410-b5e6-96231b3b80d8