CrashRecovery: Fix raise() override to actually send the right signal, *cough*.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116072 91177308-0d34-0410-b5e6-96231b3b80d8

A few 80 column cleanups

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116069 91177308-0d34-0410-b5e6-96231b3b80d8

trailing whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116068 91177308-0d34-0410-b5e6-96231b3b80d8

Reapply 116059, this time without the fatfingered pasto at the top.

''const'ify getMachineOpValue() and associated helpers.'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116067 91177308-0d34-0410-b5e6-96231b3b80d8

Reverting 116059. Bots are unhappy with it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116064 91177308-0d34-0410-b5e6-96231b3b80d8

reverting 116056: win64_params.ll may need to be conditionalized?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116063 91177308-0d34-0410-b5e6-96231b3b80d8

Line number 0 indicates there is no source line/file name info available for this construct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116061 91177308-0d34-0410-b5e6-96231b3b80d8

'const'ify getMachineOpValue() and associated helpers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116059 91177308-0d34-0410-b5e6-96231b3b80d8

Start separating out code metrics into code size metrics and code performance metrics.  Partial Specialization will apply the former to function specializations, and the latter to all callsites that can use a specialization, in order to decide whether to create a specialization

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116057 91177308-0d34-0410-b5e6-96231b3b80d8

Small patch to restore home register stack space allocation for the Win64 case.  Add test case.  This code eventually needs to be tighter, since it's always allocating it, even in leaf routines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116056 91177308-0d34-0410-b5e6-96231b3b80d8

Change register allocation order for ARM VFP and NEON registers to put the
callee-saved registers at the end of the lists.  Also prefer to avoid using
the low registers that are in register subclasses required by certain
instructions, so that those registers will more likely be available when needed.
This change makes a huge improvement in spilling in some cases.  Thanks to
Jakob for helping me realize the problem.

Most of this patch is fixing the testsuite.  There are quite a few places
where we're checking for specific registers.  I changed those to wildcards
in places where that doesn't weaken the tests.  The spill-q.ll and
thumb2-spill-q.ll tests stopped spilling with this change, so I added a bunch
of live values to force spills on those tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116055 91177308-0d34-0410-b5e6-96231b3b80d8

testcase that goes with r116053

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116054 91177308-0d34-0410-b5e6-96231b3b80d8

fix a subtle bug I introduced in my refactoring, where we stopped preferring
the i8 versions of instructions in some cases.  In test6, we started
generating:

cmpq $0, -8(%rsp)            ## encoding: [0x48,0x81,0x7c,0x24,0xf8,0x00,0x00,0x00,0x00]
                                        ## <MCInst #478 CMP64mi32
                                        ##  <MCOperand Reg:114>
                                        ##  <MCOperand Imm:1>
                                        ##  <MCOperand Reg:0>
                                        ##  <MCOperand Imm:-8>
                                        ##  <MCOperand Reg:0>
                                        ##  <MCOperand Imm:0>>

instead of:

cmpq $0, -8(%rsp)            ## encoding: [0x48,0x83,0x7c,0x24,0xf8,0x00]
                                        ## <MCInst #479 CMP64mi8
                                        ##  <MCOperand Reg:114>
                                        ##  <MCOperand Imm:1>
                                        ##  <MCOperand Reg:0>
                                        ##  <MCOperand Imm:-8>
                                        ##  <MCOperand Reg:0>
                                        ##  <MCOperand Imm:0>>

Fix this and add some comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116053 91177308-0d34-0410-b5e6-96231b3b80d8

rename test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116052 91177308-0d34-0410-b5e6-96231b3b80d8

merge tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116051 91177308-0d34-0410-b5e6-96231b3b80d8

filecheckize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116050 91177308-0d34-0410-b5e6-96231b3b80d8

reapply: Use the new TB_NOT_REVERSABLE flag instead of special
reapply: reimplement the second half of the or/add optimization.  We should now

with no changes.  Turns out that one missing "Defs = [EFLAGS]" can upset things
a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116040 91177308-0d34-0410-b5e6-96231b3b80d8

reapply the patch reverted in r116033:
"Reimplement (part of) the or -> add optimization.  Matching 'or' into 'add'"

With a critical fix: the add pseudos clobber EFLAGS.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116039 91177308-0d34-0410-b5e6-96231b3b80d8

Fix Formatting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116038 91177308-0d34-0410-b5e6-96231b3b80d8

MC-COFF: Fix Simple and Complex type. Fixes PR8320.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116037 91177308-0d34-0410-b5e6-96231b3b80d8

Fix Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116036 91177308-0d34-0410-b5e6-96231b3b80d8

Update CMake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116034 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "Reimplement (part of) the or -> add optimization.  Matching 'or' into
'add'", which seems to have broken just about everything.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116033 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "Use the new TB_NOT_REVERSABLE flag instead of special ", which depends
on r116007, which I am about to revert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116032 91177308-0d34-0410-b5e6-96231b3b80d8

Revert "reimplement the second half of the or/add optimization.  We should now",
which depends on r116007, which I am about to revert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116031 91177308-0d34-0410-b5e6-96231b3b80d8

Fix -Asserts warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116030 91177308-0d34-0410-b5e6-96231b3b80d8

Move to thumb2 loads, fixes a problem with incoming registers
as thumb1.

Fixes lencod.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116027 91177308-0d34-0410-b5e6-96231b3b80d8

reimplement the second half of the or/add optimization.  We should now
only end up emitting LEA instead of OR.  If we aren't able to promote
something into an LEA, we should never be emitting it as an ADD.

Add some testcases that we emit "or" in cases where we used to produce
an "add".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116026 91177308-0d34-0410-b5e6-96231b3b80d8

Add test file for simple ARM binary encodings with MC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116024 91177308-0d34-0410-b5e6-96231b3b80d8

Enable binary encoding of some simple instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116022 91177308-0d34-0410-b5e6-96231b3b80d8

Try to fix ocaml bindings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116021 91177308-0d34-0410-b5e6-96231b3b80d8

Make <target>CodeEmitter::getBinaryCodeForInstr() a const method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116018 91177308-0d34-0410-b5e6-96231b3b80d8

Use the new TB_NOT_REVERSABLE flag instead of special
casing FsMOVAPDrr/FsMOVAPSrr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116016 91177308-0d34-0410-b5e6-96231b3b80d8

MC-COFF: Add test for my last commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116015 91177308-0d34-0410-b5e6-96231b3b80d8

simplify some map operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116014 91177308-0d34-0410-b5e6-96231b3b80d8

MC-COFF: Handle relaxation in COFF better. Fixes PR8321.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116013 91177308-0d34-0410-b5e6-96231b3b80d8

Delete the FormulaSorter class and inline its one method into its
one user. This code will be restructured soon and FormulaSorter
is getting in the way.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116012 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a spello.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116011 91177308-0d34-0410-b5e6-96231b3b80d8

Charge a formula for explicit multiplies on scaled registers too,
not just base registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116010 91177308-0d34-0410-b5e6-96231b3b80d8

Use size_t for consistency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116009 91177308-0d34-0410-b5e6-96231b3b80d8

When merging one use into another, transfer the offsets from
the old use to the new one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116008 91177308-0d34-0410-b5e6-96231b3b80d8

Reimplement (part of) the or -> add optimization.  Matching 'or' into 'add'
is general goodness because it allows ORs to be converted to LEA to avoid
inserting copies.  However, this is bad because it makes the generated .s
file less obvious and gives valgrind heartburn (tons of false positives in
bitfield code).

While the general fix should be in valgrind, we can at least try to avoid
emitting ADD instructions that *don't* get promoted to LEA.  This is more
work because it requires introducing pseudo instructions to represents
"add that knows the bits are disjoint", but hey, people really love valgrind.

This fixes this testcase:
https://bugs.kde.org/show_bug.cgi?id=242137#c20

the add r/i cases are coming next.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116007 91177308-0d34-0410-b5e6-96231b3b80d8

After splitting, the remaining LiveInterval may be fragmented into multiple
connected components. These components should be allocated different virtual
registers because there is no reason for them to be allocated together.

Add the ConnectedVNInfoEqClasses class to calculate the connected components,
and move values to new LiveIntervals.

Use it from SplitKit::rewrite by creating new virtual registers for the
components.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116006 91177308-0d34-0410-b5e6-96231b3b80d8

Fix LSR to keep the RegUseTracker up to date when combining users.
This doesn't usually matter, because the other heuristics usually
succeed regardless, but it's good to keep the register use
bookkeeping consistent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116005 91177308-0d34-0410-b5e6-96231b3b80d8

Remove LoopIndexSplit pass. It is neither maintained nor used by anyone.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116004 91177308-0d34-0410-b5e6-96231b3b80d8

Unbreak cmake build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116003 91177308-0d34-0410-b5e6-96231b3b80d8

Code refactoring.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116002 91177308-0d34-0410-b5e6-96231b3b80d8

Reduce casting in various tables by defining the table
with the right types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116001 91177308-0d34-0410-b5e6-96231b3b80d8

Warn about broken GCCs on ARM due to the problem fixed:
http://gcc.gnu.org/ml/gcc-patches/2010-09/msg01070.html

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115998 91177308-0d34-0410-b5e6-96231b3b80d8

simplify code: don't build up vector only to assert it is empty.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115997 91177308-0d34-0410-b5e6-96231b3b80d8

Now with fewer extraneous semicolons!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115996 91177308-0d34-0410-b5e6-96231b3b80d8

Move checking for t2MOVCCi16 to the right place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115994 91177308-0d34-0410-b5e6-96231b3b80d8

Trivial MC code emitter shell. No instruction forms actually handled yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115993 91177308-0d34-0410-b5e6-96231b3b80d8

Correctly check if a path is a directory. Fix by Brian Korver.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115991 91177308-0d34-0410-b5e6-96231b3b80d8

Provie a clearner interface so that FE can decide whether a function has prototype or not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115988 91177308-0d34-0410-b5e6-96231b3b80d8

Include the auto-generated bits for machine encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115987 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typo in comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115986 91177308-0d34-0410-b5e6-96231b3b80d8

Remember to promote load/store types for stack to register size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115984 91177308-0d34-0410-b5e6-96231b3b80d8

convert test to use the existing classes that the multipatterns
use.  Since TEST is completely different than all other binops,
don't define a multipattern for it.

This completes factorization of binops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115982 91177308-0d34-0410-b5e6-96231b3b80d8

convert cmp to use a multipattern

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115978 91177308-0d34-0410-b5e6-96231b3b80d8

Canonicalize X86ISD::MOVDDUP nodes to v2f64 to make sure all cases match. Also eliminate unneeded isel patterns. rdar://8520311

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115977 91177308-0d34-0410-b5e6-96231b3b80d8

This file needs ToolOutputFile.h too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115976 91177308-0d34-0410-b5e6-96231b3b80d8

ARM instruction don't have instruction prefixes, so remove the helper functions
for them from the MCCodeEmitter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115975 91177308-0d34-0410-b5e6-96231b3b80d8

Add output stream operator for MCInst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115974 91177308-0d34-0410-b5e6-96231b3b80d8

Move tool_output_file into its own file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115973 91177308-0d34-0410-b5e6-96231b3b80d8

Add initialization routines for Instrumentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115971 91177308-0d34-0410-b5e6-96231b3b80d8

reduce redundancy between pattern copies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115968 91177308-0d34-0410-b5e6-96231b3b80d8

the opcode for BinOpMI/BinOpMI8 is always the same, remove the argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115967 91177308-0d34-0410-b5e6-96231b3b80d8

Improve comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115966 91177308-0d34-0410-b5e6-96231b3b80d8

Add initialization routines to InstCombine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115965 91177308-0d34-0410-b5e6-96231b3b80d8

convert adc/sbb to a multipattern.  Because the adde/sube nodes
are not defined as returning EFLAGS (like add_flag and friends),
the entire multipattern and several of the subclasses need to be
cloned.

This could be handled through better instantiation support in tblgen,
but it isn't meta enough.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115964 91177308-0d34-0410-b5e6-96231b3b80d8

Add initialization routines for VMCore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115963 91177308-0d34-0410-b5e6-96231b3b80d8

Fix Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115959 91177308-0d34-0410-b5e6-96231b3b80d8

Fix warnings on Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115958 91177308-0d34-0410-b5e6-96231b3b80d8

Add initialization routines for Target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115957 91177308-0d34-0410-b5e6-96231b3b80d8

Fix obvious mistake pointed out by Michael Spencer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115952 91177308-0d34-0410-b5e6-96231b3b80d8

Print more loop info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115951 91177308-0d34-0410-b5e6-96231b3b80d8

Print out MBB number when rewriting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115950 91177308-0d34-0410-b5e6-96231b3b80d8

Add initialization routines for CodeGen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115949 91177308-0d34-0410-b5e6-96231b3b80d8

Add an implementation of the initialization routine for IPA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115947 91177308-0d34-0410-b5e6-96231b3b80d8

Add initialization routines for Analysis and IPA.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115946 91177308-0d34-0410-b5e6-96231b3b80d8

gtest: Fix warnings on MinGW.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115945 91177308-0d34-0410-b5e6-96231b3b80d8

CMake: Fix warning in gtest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115935 91177308-0d34-0410-b5e6-96231b3b80d8

Add an initialization routine for libLLVMipo.a

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115933 91177308-0d34-0410-b5e6-96231b3b80d8

Add a header that I forgot to commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115932 91177308-0d34-0410-b5e6-96231b3b80d8

Cache interval iterators in SplitEditor::addTruncSimpleRange so we only have to
do one find().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115929 91177308-0d34-0410-b5e6-96231b3b80d8

Clean up debug printing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115928 91177308-0d34-0410-b5e6-96231b3b80d8

Next step on the getting-rid-of-static-ctors train: begin adding per-library
initialization functions that initialize the set of passes implemented in
that library.  Add C bindings for these functions as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115927 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a warning when building with clang++.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115924 91177308-0d34-0410-b5e6-96231b3b80d8

trailing whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115923 91177308-0d34-0410-b5e6-96231b3b80d8

Add the missing cases to the type->registerclass conversion function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115921 91177308-0d34-0410-b5e6-96231b3b80d8

Implement two virtual functions in SPUTargetLowering.

Before the implementation of isLegalAddressingMode, some rare cases
of code were miscompiled if optimized with the LoopStrengthReduce pass.
It is unclear (to me) if LSR is "allowed" to produce wrong code with a
bad TargetLowering, or if the bug is elsewhere and this patch just
hides it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115919 91177308-0d34-0410-b5e6-96231b3b80d8

Minor cosmetic change: fix DOSish \r\n.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115910 91177308-0d34-0410-b5e6-96231b3b80d8

MC-COFF: Fix symbol aliases. Fixes PR8251.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115909 91177308-0d34-0410-b5e6-96231b3b80d8

test: Fix binary stdin issues with coff-dump on Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115908 91177308-0d34-0410-b5e6-96231b3b80d8

Use the correct register class for load instructions - fixes
compilation of MultiSource/Benchmarks/Bullet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115907 91177308-0d34-0410-b5e6-96231b3b80d8

Use the correct register class here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115906 91177308-0d34-0410-b5e6-96231b3b80d8

Use the thumb2 conditional move instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115905 91177308-0d34-0410-b5e6-96231b3b80d8

Remove in-progress assertion, add TODO.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115904 91177308-0d34-0410-b5e6-96231b3b80d8

Add the header that I accidentally forgot from r115900.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115901 91177308-0d34-0410-b5e6-96231b3b80d8