oota-llvm.git
11 years ago[msan] Handle mixed track-origins and keep-going settings (llvm part).
Evgeniy Stepanov [Fri, 31 May 2013 12:04:29 +0000 (12:04 +0000)]
[msan] Handle mixed track-origins and keep-going settings (llvm part).

Before this change, each module defined a weak_odr global __msan_track_origins
with a value of 1 if origin tracking is enabled, 0 if disabled. If there are
modules with different values, any of them may win. If 0 wins, and there is at
least one module with 1, the program will most likely crash.

With this change, __msan_track_origins is only emitted if origin tracking is
on. Then runtime library detects if there is at least one module with origin
tracking, and enables runtime support for it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182997 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoX86: change MOV64ri64i32 into MOV32ri64
Tim Northover [Fri, 31 May 2013 09:57:13 +0000 (09:57 +0000)]
X86: change MOV64ri64i32 into MOV32ri64

The MOV64ri64i32 instruction required hacky MCInst lowering because it was
allocated as setting a GR64, but the eventual instruction ("movl") only set a
GR32. This converts it into a so-called "MOV32ri64" which still accepts a
(appropriate) 64-bit immediate but defines a GR32. This is then converted to
the full GR64 by a SUBREG_TO_REG operation, thus keeping everyone happy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182991 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd links to the System z architecture manual and ABI
Richard Sandiford [Fri, 31 May 2013 09:14:54 +0000 (09:14 +0000)]
Add links to the System z architecture manual and ABI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182990 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix ScalarEvolution::ComputeExitLimitFromCond for 'or' conditions.
Andrew Trick [Fri, 31 May 2013 06:43:25 +0000 (06:43 +0000)]
Fix ScalarEvolution::ComputeExitLimitFromCond for 'or' conditions.

Fixes PR16130 - clang produces incorrect code with loop/expression at -O2.

This is a 2+ year old bug that's now holding up the release. It's a
case where we knowingly made aggressive assumptions about undefined
behavior. These assumptions are wrong when SCEV is computing a
subexpression that does not directly control the branch. With this
fix, we avoid making assumptions in those cases but still optimize the
common case. SCEV's trip count computation for exits controlled by
'or' expressions is now analagous to the trip count computation for
loops with multiple exits. I had already fixed the multiple exit case
to be conservative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182989 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[mips] Big-endian code generation for atomic instructions.
Akira Hatanaka [Fri, 31 May 2013 03:25:44 +0000 (03:25 +0000)]
[mips] Big-endian code generation for atomic instructions.

Patch by Jyun-Yan You.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182984 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix wrong comment. Null is not acceptable.
Matt Arsenault [Fri, 31 May 2013 01:40:30 +0000 (01:40 +0000)]
Fix wrong comment. Null is not acceptable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182979 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoReapply with r182909 with a fix to the calculation of the new indices for
Nick Lewycky [Fri, 31 May 2013 00:59:42 +0000 (00:59 +0000)]
Reapply with r182909 with a fix to the calculation of the new indices for
insertelement instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182976 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove debug print added in r182949.
Ahmed Bougacha [Thu, 30 May 2013 23:46:47 +0000 (23:46 +0000)]
Remove debug print added in r182949.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182973 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert r182937 and r182877.
Rafael Espindola [Thu, 30 May 2013 20:37:52 +0000 (20:37 +0000)]
Revert r182937 and r182877.

r182877 broke MCJIT tests on ARM and r182937 was working around another failure
by r182877.

This should make the ARM bots green.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182960 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove unused member.
Rafael Espindola [Thu, 30 May 2013 20:19:35 +0000 (20:19 +0000)]
Remove unused member.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182958 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix a couple of typos and 80-col.
Eric Christopher [Thu, 30 May 2013 18:59:11 +0000 (18:59 +0000)]
Fix a couple of typos and 80-col.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182954 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoUse the const_cast only where necessary.
Bill Wendling [Thu, 30 May 2013 18:52:57 +0000 (18:52 +0000)]
Use the const_cast only where necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182950 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMCObjectSymbolizer: Switch from IntervalMap to sorted vector, following r182625.
Ahmed Bougacha [Thu, 30 May 2013 18:18:36 +0000 (18:18 +0000)]
MCObjectSymbolizer: Switch from IntervalMap to sorted vector, following r182625.

This removes the need for the missing SectionRef operator< workaround, and fixes
an IntervalMap assert about alignment on MSVC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182949 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoImplement IEEE-754R 2008 nextUp/nextDown functions in the guise of the function APFlo...
Michael Gottesman [Thu, 30 May 2013 18:07:13 +0000 (18:07 +0000)]
Implement IEEE-754R 2008 nextUp/nextDown functions in the guise of the function APFloat::next(bool nextDown).

rdar://13852078

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182945 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix warning and resulting formatting issue.
Paul Redmond [Thu, 30 May 2013 17:24:32 +0000 (17:24 +0000)]
Fix warning and resulting formatting issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182939 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevise llvm.vectorizer.width documentation
Paul Redmond [Thu, 30 May 2013 17:22:46 +0000 (17:22 +0000)]
Revise llvm.vectorizer.width documentation

- clarify that vectorizer.width only applies if the vectorizer decides to
  vectorize.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182938 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't use fast isel on this test.
Rafael Espindola [Thu, 30 May 2013 16:29:28 +0000 (16:29 +0000)]
Don't use fast isel on this test.

This fixes the test on ARM. Looks like it was broken by r182877. Not
sure if this is a bug on fast isel on ARM, but this should help fix
the ARM bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182937 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoForce a triple so we don't get bitten by windows' different regalloc.
Benjamin Kramer [Thu, 30 May 2013 15:39:35 +0000 (15:39 +0000)]
Force a triple so we don't get bitten by windows' different regalloc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182935 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoForce fragile test to the atom scheduler model.
Benjamin Kramer [Thu, 30 May 2013 15:22:28 +0000 (15:22 +0000)]
Force fragile test to the atom scheduler model.

The pattern the test originally checked for doesn't occur on other -mcpu
settings. On atom it's still there though slightly differently scheduled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182933 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdded a sub-project status update section to the release notes with details
Ashok Thirumurthi [Thu, 30 May 2013 14:23:07 +0000 (14:23 +0000)]
Added a sub-project status update section to the release notes with details
on the LLDB 3.3 release.

Reviewed by: Greg Clayton and Bill Wendling

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182931 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoX86: allow registers 8-15 in test
Tim Northover [Thu, 30 May 2013 13:56:32 +0000 (13:56 +0000)]
X86: allow registers 8-15 in test

This test was failing on some hosts when an unexpected register was used for a
variable. This just extends the regexp to allow the new x86-64 registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182929 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoX86: use sub-register sequences for MOV*r0 operations
Tim Northover [Thu, 30 May 2013 13:19:42 +0000 (13:19 +0000)]
X86: use sub-register sequences for MOV*r0 operations

Instead of having a bunch of separate MOV8r0, MOV16r0, ... pseudo-instructions,
it's better to use a single MOV32r0 (which will expand to "xorl %reg, %reg")
and obtain other sizes with EXTRACT_SUBREG and SUBREG_TO_REG. The encoding is
smaller and partial register updates can sometimes be avoided.

Until recently, this sequence was a barrier to rematerialization though. That
should now be fixed so it's an appropriate time to make the change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182928 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix incorrect parameter name in LIT docs.
Sergey Matveev [Thu, 30 May 2013 12:37:52 +0000 (12:37 +0000)]
Fix incorrect parameter name in LIT docs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182926 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix rematerialization into physical registers.
Tim Northover [Thu, 30 May 2013 12:30:50 +0000 (12:30 +0000)]
Fix rematerialization into physical registers.

r182872 introduced a bug in how the register-coalescer's rematerialization
handled defining a physical register. It relied on the output of the
coalescer's setRegisters method to determine whether the replacement
instruction needed an implicit-def. However, this value isn't necessarily the
same as the CopyMI's actual destination register which is what the rest of the
basic-block expects us to be defining.

The commit changes the rematerializer to use the actual register attached to
CopyMI in its decision.

This will be tested soon by an X86 patch which moves everything to using
MOV32r0 instead of other sizes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182925 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[NVPTX] Fix case where a sext load of an i1 type may produce an
Justin Holewinski [Thu, 30 May 2013 12:22:39 +0000 (12:22 +0000)]
[NVPTX] Fix case where a sext load of an i1 type may produce an
ld.u1 instead of an ld.u8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182924 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoX86: change zext moves to use sub-register infrastructure.
Tim Northover [Thu, 30 May 2013 10:43:18 +0000 (10:43 +0000)]
X86: change zext moves to use sub-register infrastructure.

32-bit writes on amd64 zero out the high bits of the corresponding 64-bit
register. LLVM makes use of this for zero-extension, but until now relied on
custom MCLowering and other code to fixup instructions. Now we have proper
handling of sub-registers, this can be done by creating SUBREG_TO_REG
instructions at selection-time.

Should be no change in functionality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182921 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Enable unaligned accesses
Richard Sandiford [Thu, 30 May 2013 09:45:42 +0000 (09:45 +0000)]
[SystemZ] Enable unaligned accesses

The code to distinguish between unaligned and aligned addresses was
already there, so this is mostly just a switch-on-and-test process.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182920 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert r182909.
Evgeniy Stepanov [Thu, 30 May 2013 09:40:17 +0000 (09:40 +0000)]
Revert r182909.

PR/16177

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182919 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix warning on varialbe unused in opt builds.
Daniel Jasper [Thu, 30 May 2013 07:01:43 +0000 (07:01 +0000)]
Fix warning on varialbe unused in opt builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182914 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFixed bug when tests in executable partially used absolute paths.
Galina Kistanova [Thu, 30 May 2013 04:56:28 +0000 (04:56 +0000)]
Fixed bug when tests in executable partially used absolute paths.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182910 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSwizzle vector inputs if it helps us eliminate shuffles.
Nick Lewycky [Thu, 30 May 2013 04:33:38 +0000 (04:33 +0000)]
Swizzle vector inputs if it helps us eliminate shuffles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182909 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoChange how we iterate over relocations on ELF.
Rafael Espindola [Thu, 30 May 2013 03:05:14 +0000 (03:05 +0000)]
Change how we iterate over relocations on ELF.

For COFF and MachO, sections semantically have relocations that apply to them.
That is not the case on ELF.

In relocatable objects (.o), a section with relocations in ELF has offsets to
another section where the relocations should be applied.

In dynamic objects and executables, relocations don't have an offset, they have
a virtual address. The section sh_info may or may not point to another section,
but that is not actually used for resolving the relocations.

This patch exposes that in the ObjectFile API. It has the following advantages:

* Most (all?) clients can handle this more efficiently. They will normally walk
all relocations, so doing an effort to iterate in a particular order doesn't
save time.

* llvm-readobj now prints relocations in the same way the native readelf does.

* probably most important, relocations that don't point to any section are now
visible. This is the case of relocations in the rela.dyn section. See the
updated relocation-executable.test for example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182908 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRename variable to be more descriptive.
Eric Christopher [Thu, 30 May 2013 00:43:35 +0000 (00:43 +0000)]
Rename variable to be more descriptive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182903 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFormatting.
Eric Christopher [Thu, 30 May 2013 00:43:32 +0000 (00:43 +0000)]
Formatting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182902 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoReformat comments here.
Eric Christopher [Thu, 30 May 2013 00:43:30 +0000 (00:43 +0000)]
Reformat comments here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182901 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd a comment and some tests including the NULL byte.
Eric Christopher [Thu, 30 May 2013 00:43:26 +0000 (00:43 +0000)]
Add a comment and some tests including the NULL byte.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182900 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoThis testcase tests command line attributes which we don't yet support.
Bill Wendling [Thu, 30 May 2013 00:32:04 +0000 (00:32 +0000)]
This testcase tests command line attributes which we don't yet support.

In fact, we're probably going to support these flags in completely different
ways. So this test is no longer valid.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182899 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove dead return.
Rafael Espindola [Thu, 30 May 2013 00:29:46 +0000 (00:29 +0000)]
Remove dead return.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182898 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdded a unittest for APFloat::getSmallestNormalized.
Michael Gottesman [Thu, 30 May 2013 00:18:47 +0000 (00:18 +0000)]
Added a unittest for APFloat::getSmallestNormalized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182897 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdded code to the unittest for APFloat::getSmallest to double check that we consider...
Michael Gottesman [Thu, 30 May 2013 00:18:44 +0000 (00:18 +0000)]
Added code to the unittest for APFloat::getSmallest to double check that we consider the result to be denormal.

I additionally changed certain checks to use EXPECT_FALSE instead of a boolean
complement with EXPECT_TRUE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182896 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd a unittest for APFloat::getSmallest.
Michael Gottesman [Wed, 29 May 2013 23:58:29 +0000 (23:58 +0000)]
Add a unittest for APFloat::getSmallest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182894 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoOrder CALLSEQ_START and CALLSEQ_END nodes.
Andrew Trick [Wed, 29 May 2013 22:03:55 +0000 (22:03 +0000)]
Order CALLSEQ_START and CALLSEQ_END nodes.

Fixes PR16146: gdb.base__call-ar-st.exp fails after
pre-RA-sched=source fixes.

Patch by Xiaoyi Guo!

This also fixes an unsupported dbg.value test case. Codegen was
previously incorrect but the test was passing by luck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182885 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoX86: Fix Defs/Uses for insts that imp-def/imp-use both an A-register and EFLAGS.
Ahmed Bougacha [Wed, 29 May 2013 21:13:57 +0000 (21:13 +0000)]
X86: Fix Defs/Uses for insts that imp-def/imp-use both an A-register and EFLAGS.

This corrects a problem where x86 instructions that implicitly define/use both
an A-register (RAX, EAX, ..) and EFLAGS were declared as only defining/using
EFLAGS, because the outer "let Defs/Uses = [EFLAGS]" in the various multiclasses
overrides the "let Defs/Uses = [areg]" in BinOpAI.

The instructions deriving from BinOpAI were moved out of the "let Defs", and a
BinOpAI_FF class was created, for instructions that implicitly define and use
EFLAGS and the A-register (SBC, ADC).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182883 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't assume the registers will be enumerated sequentially.
Chad Rosier [Wed, 29 May 2013 20:42:21 +0000 (20:42 +0000)]
Don't assume the registers will be enumerated sequentially.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182879 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd colored diagnostics when building LLVM with cmake + ninja + clang
Arnaud A. de Grandmaison [Wed, 29 May 2013 20:41:35 +0000 (20:41 +0000)]
Add colored diagnostics when building LLVM with cmake + ninja + clang

When invoked from Ninja, clang does not detect that it can use colors : see https://github.com/martine/ninja/issues/174

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182878 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoEnable FastISel on ARM for Linux and NaCl
JF Bastien [Wed, 29 May 2013 20:38:10 +0000 (20:38 +0000)]
Enable FastISel on ARM for Linux and NaCl

FastISel was only enabled for iOS ARM and Thumb2, this patch enables it
for ARM (not Thumb2) on Linux and NaCl.

Thumb2 support needs a bit more work, mainly around register class
restrictions.

The patch punts to SelectionDAG when doing TLS relocation on non-Darwin
targets. I will fix this and other FastISel-to-SelectionDAG failures in
a separate patch.

The patch also forces FastISel to retain frame pointers: iOS always
keeps them for backtracking (so emitted code won't change because of
this), but Linux was getting much worse code that was incorrect when
using big frames (such as test-suite's lencod). I'll also fix this in a
later patch, it will probably require a peephole so that FastISel
doesn't rematerialize frame pointers back-to-back.

The test changes are straightforward, similar to:
  http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20130513/174279.html
They also add a vararg test that got dropped in that change.

I ran all of test-suite on A15 hardware with --optimize-option=-O0 and
all the tests pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182877 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDon't reach into the middle of TargetMachine and cache one of its ivars.
Bill Wendling [Wed, 29 May 2013 20:37:19 +0000 (20:37 +0000)]
Don't reach into the middle of TargetMachine and cache one of its ivars.
Not only does this break encapsulation, it's gross.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182876 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTeach ReMaterialization to be more cunning about subregisters
Tim Northover [Wed, 29 May 2013 19:32:06 +0000 (19:32 +0000)]
Teach ReMaterialization to be more cunning about subregisters

This allows rematerialization during register coalescing to handle
more cases involving operations like SUBREG_TO_REG which might need to
be rematerialized using sub-register indices.

For example, code like:
    v1(GPR64):sub_32 = MOVZ something
    v2(GPR64) = COPY v1(GPR64)
should be convertable to:
    v2(GPR64):sub_32 = MOVZ something

but previously we just gave up in places like this

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182872 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSimplify logic by using the appropriate functions.
Adrian Prantl [Wed, 29 May 2013 17:33:31 +0000 (17:33 +0000)]
Simplify logic by using the appropriate functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182869 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoLTO+Debug Info: revert r182791.
Manman Ren [Wed, 29 May 2013 17:16:59 +0000 (17:16 +0000)]
LTO+Debug Info: revert r182791.

Since the testing case uses ref_addr, which requires version 3+ to work,
we will solve the dwarf version issue first.

This patch also causes failures in one of the bots. I will update the patch
accordingly in my next attempt.

rdar://13926659

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182867 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTidy some register classes for ARM and Thumb
JF Bastien [Wed, 29 May 2013 15:45:47 +0000 (15:45 +0000)]
Tidy some register classes for ARM and Thumb

Tidy up three places where the register class for ARM and Thumb wasn't
restrictive enough:
 - No PC dest for reg-reg add/orr/sub.
 - No PC dest for shifts.
 - No PC or SP for Thumb2 reg-imm add.

I encountered this while combining FastISel with
-verify-machineinstrs. These instructions defined registers whose
classes weren't restrictive enough, and the uses failed
verification. They're also undefined in the ISA, or would produce code
that FastISel wouldn't want. This doesn't fix the register class
narrowing issue (where uses should restrict definitions), and isn't
thorough, but it's a small step in the right direction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182863 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSparcFrameLowering.cpp: Mark verifyLeafProcRegUse() as UNUSED. [-Wunused-function]
NAKAMURA Takumi [Wed, 29 May 2013 12:10:42 +0000 (12:10 +0000)]
SparcFrameLowering.cpp: Mark verifyLeafProcRegUse() as UNUSED. [-Wunused-function]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182850 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Two tests missing from previous commit
Richard Sandiford [Wed, 29 May 2013 11:59:26 +0000 (11:59 +0000)]
[SystemZ] Two tests missing from previous commit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182847 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Immediate compare-and-branch support
Richard Sandiford [Wed, 29 May 2013 11:58:52 +0000 (11:58 +0000)]
[SystemZ] Immediate compare-and-branch support

This patch adds support for the CIJ and CGIJ instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182846 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMove test that depends on the X86 backend into the right subdirectory.
Benjamin Kramer [Wed, 29 May 2013 08:40:49 +0000 (08:40 +0000)]
Move test that depends on the X86 backend into the right subdirectory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182834 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTemporary fix to get rid of gcc warning.
Patrik Hagglund [Wed, 29 May 2013 07:32:08 +0000 (07:32 +0000)]
Temporary fix to get rid of gcc warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182832 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAllow overriding the location of C/C++ compilers in Android CMake build.
Evgeniy Stepanov [Wed, 29 May 2013 07:23:20 +0000 (07:23 +0000)]
Allow overriding the location of C/C++ compilers in Android CMake build.

Patch by Greg Fitzgerald.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182831 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[Sparc] Add support for leaf functions in sparc backend.
Venkatraman Govindaraju [Wed, 29 May 2013 04:46:31 +0000 (04:46 +0000)]
[Sparc] Add support for leaf functions in sparc backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182822 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoLoopVectorize.cpp: Fix abuse of StringRef on Twine. Twine captures the pointer of...
NAKAMURA Takumi [Wed, 29 May 2013 03:13:47 +0000 (03:13 +0000)]
LoopVectorize.cpp: Fix abuse of StringRef on Twine. Twine captures the pointer of StringRef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182820 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoWhitespace.
NAKAMURA Takumi [Wed, 29 May 2013 03:13:41 +0000 (03:13 +0000)]
Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182819 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDebug Info: Update documentation to match recent (& not so recent) schema changes
David Blaikie [Wed, 29 May 2013 02:05:13 +0000 (02:05 +0000)]
Debug Info: Update documentation to match recent (& not so recent) schema changes

This updates the debug info metadata schema documentation for various
schema changes made recently surrounding filename information for
scopes and the representation of imported entities.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182817 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDebug Info: Reorder accessor to match field order.
David Blaikie [Wed, 29 May 2013 02:05:07 +0000 (02:05 +0000)]
Debug Info: Reorder accessor to match field order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182816 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMips assembler: Improve set register alias handling
Jack Carter [Tue, 28 May 2013 22:21:05 +0000 (22:21 +0000)]
Mips assembler: Improve set register alias handling

This patch solves the problem of numeric register values not being accepted:

../set_alias.s:1:11: error: expected valid expression after comma
        .set    r4,$4
                    ^
The parsing of .set directive is changed and handling of symbols in code
as well to enable this feature.

The test example is added.

Patch by Vladimir Medic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182807 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAArch64: clarify -help message
Tim Northover [Tue, 28 May 2013 21:09:39 +0000 (21:09 +0000)]
AArch64: clarify -help message

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182804 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[Mips] Add Mips specific dynamic table entry tags.
Simon Atanasyan [Tue, 28 May 2013 20:48:56 +0000 (20:48 +0000)]
[Mips] Add Mips specific dynamic table entry tags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182803 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd support for llvm.vectorizer metadata
Paul Redmond [Tue, 28 May 2013 20:00:34 +0000 (20:00 +0000)]
Add support for llvm.vectorizer metadata

- llvm.loop.parallel metadata has been renamed to llvm.loop to be more generic
  by making the root of additional loop metadata.
  - Loop::isAnnotatedParallel now looks for llvm.loop and associated
    llvm.mem.parallel_loop_access
  - document llvm.loop and update llvm.mem.parallel_loop_access
- add support for llvm.vectorizer.width and llvm.vectorizer.unroll
  - document llvm.vectorizer.* metadata
  - add utility class LoopVectorizerHints for getting/setting loop metadata
  - use llvm.vectorizer.width=1 to indicate already vectorized instead of
    already_vectorized
- update existing tests that used llvm.loop.parallel and
  llvm.vectorizer.already_vectorized

Reviewed by: Nadav Rotem

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182802 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[APInt] Implement tcDecrement as a counterpart to tcIncrement. This is for use in...
Michael Gottesman [Tue, 28 May 2013 19:50:20 +0000 (19:50 +0000)]
[APInt] Implement tcDecrement as a counterpart to tcIncrement. This is for use in APFloat IEEE-754R 2008 nextUp/nextDown function.

rdar://13852078

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182801 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoARM: use pristine object file while processing relocations
Tim Northover [Tue, 28 May 2013 19:48:19 +0000 (19:48 +0000)]
ARM: use pristine object file while processing relocations

Previously we would read-modify-write the target bits when processing
relocations for the MCJIT. This had the problem that when relocations
were processed multiple times for the same object file (as they can
be), the result is not idempotent and the values became corrupted.

The solution to this is to take any bits used in the destination from
the pristine object file as LLVM emitted it.

This should fix PR16013 and remote MCJIT on ARM ELF targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182800 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoLTO+Debug Info: correctly emit inlined_subroutine when the inlined callee is
Manman Ren [Tue, 28 May 2013 19:01:58 +0000 (19:01 +0000)]
LTO+Debug Info: correctly emit inlined_subroutine when the inlined callee is
from a different CU.

We used to print out an error message and fail to generate inlined_subroutine.

If we use ref_addr in the generated DWARF, the DWARF version should be 3 or
above.
rdar://13926659

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182791 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoHexagon: Typo fix.
Jyotsna Verma [Tue, 28 May 2013 19:01:45 +0000 (19:01 +0000)]
Hexagon: Typo fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182790 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove the MCRegAliasIterator tables and compute the aliases dynamically.
Chad Rosier [Tue, 28 May 2013 18:08:48 +0000 (18:08 +0000)]
Remove the MCRegAliasIterator tables and compute the aliases dynamically.

The size reduction in the RegDiffLists are rather dramatic.  Here are a few
size differences for MCTargetDesc.o files (before and after) in bytes:
R600 - 36160B - 11184B - 69% reduction
ARM - 28480B - 8368B - 71% reduction
Mips - 816B - 576B - 29% reduction

One side effect of dynamically computing the aliases is that the iterator does
not guarantee that the entries are ordered or that duplicates have been removed.
The documentation implies this is a safe assumption and I found no clients that
requires these attributes (i.e., strict ordering and uniqueness).

My local LNT tester results showed no execution-time failures or significant
compile-time regressions (i.e., beyond what I would consider noise) for -O0g,
-O2 and -O3 runs on x86_64 and i386 configurations.
rdar://12906217

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182783 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoSimplify code. No functionality change.
Benjamin Kramer [Tue, 28 May 2013 16:39:36 +0000 (16:39 +0000)]
Simplify code. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182779 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRemove double semicolons.
Benjamin Kramer [Tue, 28 May 2013 16:31:26 +0000 (16:31 +0000)]
Remove double semicolons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182778 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoExtend RemapInstruction and friends to take an optional new parameter, a ValueMateria...
James Molloy [Tue, 28 May 2013 15:17:05 +0000 (15:17 +0000)]
Extend RemapInstruction and friends to take an optional new parameter, a ValueMaterializer.

Extend LinkModules to pass a ValueMaterializer to RemapInstruction and friends to lazily create Functions for lazily linked globals. This is a big win when linking small modules with large (mostly unused) library modules.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182776 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[msan] Fix argument shadow alignment.
Evgeniy Stepanov [Tue, 28 May 2013 13:07:43 +0000 (13:07 +0000)]
[msan] Fix argument shadow alignment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182771 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTypo
Renato Golin [Tue, 28 May 2013 11:28:37 +0000 (11:28 +0000)]
Typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182766 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Register compare-and-branch support
Richard Sandiford [Tue, 28 May 2013 10:41:11 +0000 (10:41 +0000)]
[SystemZ] Register compare-and-branch support

This patch adds support for the CRJ and CGRJ instructions.  Support for
the immediate forms will be a separate patch.

The architecture has a large number of comparison instructions.  I think
it's generally better to concentrate on using the "best" comparison
instruction first and foremost, then only use something like CRJ if
CR really was the natual choice of comparison instruction.  The patch
therefore opportunistically converts separate CR and BRC instructions
into a single CRJ while emitting instructions in ISelLowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182764 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoLinking ReleaseProcess doc with the world
Renato Golin [Tue, 28 May 2013 10:32:55 +0000 (10:32 +0000)]
Linking ReleaseProcess doc with the world

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182763 91177308-0d34-0410-b5e6-96231b3b80d8

11 years ago[SystemZ] Tweak SystemZInstrInfo::isBranch() interface
Richard Sandiford [Tue, 28 May 2013 10:13:54 +0000 (10:13 +0000)]
[SystemZ] Tweak SystemZInstrInfo::isBranch() interface

This is needed for the upcoming compare-and-branch patch.  No functional
change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182762 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoRevert r182715 and r182758
Alexey Samsonov [Tue, 28 May 2013 10:08:08 +0000 (10:08 +0000)]
Revert r182715 and r182758

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182761 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdding ReleaseProcess doc
Renato Golin [Tue, 28 May 2013 09:48:52 +0000 (09:48 +0000)]
Adding ReleaseProcess doc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182759 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFixup for r182715: provide correct arg to --gtest-filter
Alexey Samsonov [Tue, 28 May 2013 09:40:42 +0000 (09:40 +0000)]
Fixup for r182715: provide correct arg to --gtest-filter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182758 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMake BasicAliasAnalysis recognize the fact a noalias argument cannot alias another...
Michael Kuperstein [Tue, 28 May 2013 08:17:48 +0000 (08:17 +0000)]
Make BasicAliasAnalysis recognize the fact a noalias argument cannot alias another argument, even if the other argument is not itself marked noalias.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182755 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMake it explicit that GlobalAlias are ok in llvm.used.
Rafael Espindola [Mon, 27 May 2013 22:47:09 +0000 (22:47 +0000)]
Make it explicit that GlobalAlias are ok in llvm.used.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182747 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoMake helper functions static.
Rafael Espindola [Mon, 27 May 2013 22:34:59 +0000 (22:34 +0000)]
Make helper functions static.

And remove header and cpp file that are empty after that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182746 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoConvert sqrt functions into sqrt instructions when -ffast-math is in effect.
Preston Gurd [Mon, 27 May 2013 15:44:35 +0000 (15:44 +0000)]
Convert sqrt functions into sqrt instructions when -ffast-math is in effect.

When -ffast-math is in effect (on Linux, at least), clang defines
__FINITE_MATH_ONLY__ > 0 when including <math.h>. This causes the
preprocessor to include <bits/math-finite.h>, which renames the sqrt functions.
For instance, "sqrt" is renamed as "__sqrt_finite".

This patch adds the 3 new names in such a way that they will be treated
as equivalent to their respective original names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182739 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd a cpu to try to bring back the atom bots.
Rafael Espindola [Mon, 27 May 2013 13:22:52 +0000 (13:22 +0000)]
Add a cpu to try to bring back the atom bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182734 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPPC: Add a isConsecutiveLS utility function
Hal Finkel [Mon, 27 May 2013 02:06:39 +0000 (02:06 +0000)]
PPC: Add a isConsecutiveLS utility function

isConsecutiveLS is a slightly more general form of
SelectionDAG::isConsecutiveLoad. Aside from also handling stores, it also does
not assume equality of the chain operands is necessary. In the case of the PPC
backend, this chain condition is checked in a more general way by the
surrounding code.

Mostly, this part of the refactoring in preparation for supporting optimized
unaligned stores.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182723 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agollvm-objdump.cpp: Appease MSC16 x64. utostr(n++) causes internal compiler error.
NAKAMURA Takumi [Mon, 27 May 2013 00:02:48 +0000 (00:02 +0000)]
llvm-objdump.cpp: Appease MSC16 x64. utostr(n++) causes internal compiler error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182722 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPrefer to duplicate PPC Altivec loads when expanding unaligned loads
Hal Finkel [Sun, 26 May 2013 18:08:30 +0000 (18:08 +0000)]
Prefer to duplicate PPC Altivec loads when expanding unaligned loads

When expanding unaligned Altivec loads, we use the decremented offset trick to
prevent page faults. Unfortunately, if we have a sequence of consecutive
unaligned loads, this leads to suboptimal code generation because the 'extra'
load from the first unaligned load can be combined with the base load from the
second (but only if the decremented offset trick is not used for the first).
Search up and down the chain, through loads and token factors, looking for
consecutive loads, and if one is found, don't use the offset reduction trick.
These duplicate loads are later combined to yield the desired sequence (in the
future, we might want a more-powerful chain search, but that will require some
changes to allow the combiner routines to access the AA object).

This should complete the initial implementation of the optimized unaligned
Altivec load expansion. There is some refactoring that should be done, but
that will happen when the unaligned store expansion is added.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182719 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd LDC compiler to list of external OS projects using LLVM 3.3
Kai Nacke [Sun, 26 May 2013 17:37:43 +0000 (17:37 +0000)]
Add LDC compiler to list of external OS projects using LLVM 3.3

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182718 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFix PR16143: Insert DEBUG_VALUE before terminator.
Andrew Trick [Sun, 26 May 2013 08:58:50 +0000 (08:58 +0000)]
Fix PR16143: Insert DEBUG_VALUE before terminator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182717 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoFixed bug when tests in executable partially used absolute paths.
Galina Kistanova [Sun, 26 May 2013 03:58:41 +0000 (03:58 +0000)]
Fixed bug when tests in executable partially used absolute paths.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182715 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoDisable the StringMapEntry copy constructor, to make sure we
Chris Lattner [Sat, 25 May 2013 22:28:22 +0000 (22:28 +0000)]
Disable the StringMapEntry copy constructor, to make sure we
reject things like: "for (auto Entry : SomeStringMap)".  Previously
this would copy the value but not the tail allocated string data
(the key).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182713 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd support for DWARF line number table entries for values in the instruction
Cameron Zwarich [Sat, 25 May 2013 21:56:53 +0000 (21:56 +0000)]
Add support for DWARF line number table entries for values in the instruction
stream.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182712 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoAdd some comments to the stringify function.
Eric Christopher [Sat, 25 May 2013 05:13:17 +0000 (05:13 +0000)]
Add some comments to the stringify function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182710 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoPPC: Combine duplicate (offset) lvsl Altivec intrinsics
Hal Finkel [Sat, 25 May 2013 04:05:05 +0000 (04:05 +0000)]
PPC: Combine duplicate (offset) lvsl Altivec intrinsics

The lvsl permutation control instruction is a function only of the alignment of
the pointer operand (relative to the 16-byte natural alignment of Altivec
vectors). As a result, multiple lvsl intrinsics where the operands differ by a
multiple of 16 can be combined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182708 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTrack IR ordering of SelectionDAG nodes 4/4.
Andrew Trick [Sat, 25 May 2013 03:26:51 +0000 (03:26 +0000)]
Track IR ordering of SelectionDAG nodes 4/4.

Unit test cases for -pre-RA-sched=source.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182706 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTrack IR ordering of SelectionDAG nodes 3/4.
Andrew Trick [Sat, 25 May 2013 03:08:10 +0000 (03:08 +0000)]
Track IR ordering of SelectionDAG nodes 3/4.

Remove the old IR ordering mechanism and switch to new one.  Fix unit
test failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182704 91177308-0d34-0410-b5e6-96231b3b80d8

11 years agoTrack IR ordering of SelectionDAG nodes 2/4.
Andrew Trick [Sat, 25 May 2013 02:42:55 +0000 (02:42 +0000)]
Track IR ordering of SelectionDAG nodes 2/4.

Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8