oota-llvm.git
10 years agoBug 18228 - Fix accepting bitcasts between vectors of pointers with a
Matt Arsenault [Wed, 22 Jan 2014 19:21:33 +0000 (19:21 +0000)]
Bug 18228 - Fix accepting bitcasts between vectors of pointers with a
different number of elements.

Bitcasts were passing with vectors of pointers with different number of
elements since the number of elements was checking
SrcTy->getVectorNumElements() == SrcTy->getVectorNumElements() which
isn't helpful. The addrspacecast was also wrong, but that case at least
is caught by the verifier. Refactor bitcast and addrspacecast handling
in castIsValid to be more readable and fix this problem.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199821 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix inline assembly that switches between ARM and Thumb modes
Greg Fitzgerald [Wed, 22 Jan 2014 18:32:35 +0000 (18:32 +0000)]
Fix inline assembly that switches between ARM and Thumb modes

This patch restores the ARM mode if the user's inline assembly
does not.  In the object streamer, it ensures that instructions
following the inline assembly are encoded correctly and that
correct mapping symbols are emitted.  For the asm streamer, it
emits a .arm or .thumb directive.

This patch does not ensure that the inline assembly contains
the ADR instruction to switch modes at runtime.

The problem we need to solve is code like this:

  int foo(int a, int b) {
    int r = a + b;
    asm volatile(
        ".align 2     \n"
        ".arm         \n"
        "add r0,r0,r0 \n"
    : : "r"(r));
    return r+1;
  }

If we compile this function in thumb mode then the inline assembly
will switch to arm mode. We need to make sure that we switch back to
thumb mode after emitting the inline assembly or we will incorrectly
encode the instructions that follow (i.e. the assembly instructions
for return r+1).

Based on patch by David Peixotto

Change-Id: Ib57f6d2d78a22afad5de8693fba6230ff56ba48b

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199818 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDon't open or fstat files twice in llvm-ar.
Rafael Espindola [Wed, 22 Jan 2014 16:43:45 +0000 (16:43 +0000)]
Don't open or fstat files twice in llvm-ar.

We still read/mmap them twice, but the fix for that is a bit more complex.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199815 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRemove param doxygen comment for non-existing parameter.
Benjamin Kramer [Wed, 22 Jan 2014 16:22:17 +0000 (16:22 +0000)]
Remove param doxygen comment for non-existing parameter.

Found by -Wdocumentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199814 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoPass the computed magic to createBinary and createObjectFile if available.
Rafael Espindola [Wed, 22 Jan 2014 16:04:52 +0000 (16:04 +0000)]
Pass the computed magic to createBinary and createObjectFile if available.

identify_magic is not free, so we should avoid calling it twice. The argument
also makes it cheap for createBinary to just forward to createObjectFile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199813 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Silence unused diReg variable warning in non-asserting builds
David Woodhouse [Wed, 22 Jan 2014 15:31:32 +0000 (15:31 +0000)]
[x86] Silence unused diReg variable warning in non-asserting builds

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199812 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Fix uninitialized variable warning in translate{Src,Dst}Index
David Woodhouse [Wed, 22 Jan 2014 15:31:29 +0000 (15:31 +0000)]
[x86] Fix uninitialized variable warning in translate{Src,Dst}Index

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199811 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Remove now-unused isSrcOp() and isDstOp() from X86AsmParser
David Woodhouse [Wed, 22 Jan 2014 15:08:58 +0000 (15:08 +0000)]
[x86] Remove now-unused isSrcOp() and isDstOp() from X86AsmParser

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199810 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)
David Woodhouse [Wed, 22 Jan 2014 15:08:55 +0000 (15:08 +0000)]
[x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199809 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Allow segment and address-size overrides for OUTS[BWLQ] (PR9385)
David Woodhouse [Wed, 22 Jan 2014 15:08:49 +0000 (15:08 +0000)]
[x86] Allow segment and address-size overrides for OUTS[BWLQ] (PR9385)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199808 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Allow segment and address-size overrides for MOVS[BWLQ] (PR9385)
David Woodhouse [Wed, 22 Jan 2014 15:08:42 +0000 (15:08 +0000)]
[x86] Allow segment and address-size overrides for MOVS[BWLQ] (PR9385)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199807 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago]x86] Allow segment and address-size overrides for CMPS[BWLQ] (PR9385)
David Woodhouse [Wed, 22 Jan 2014 15:08:36 +0000 (15:08 +0000)]
]x86] Allow segment and address-size overrides for CMPS[BWLQ] (PR9385)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199806 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Allow address-size overrides for SCAS{8,16,32,64} (PR9385)
David Woodhouse [Wed, 22 Jan 2014 15:08:27 +0000 (15:08 +0000)]
[x86] Allow address-size overrides for SCAS{8,16,32,64} (PR9385)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199805 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Allow address-size overrides for STOS[BWLQ] (PR9385)
David Woodhouse [Wed, 22 Jan 2014 15:08:21 +0000 (15:08 +0000)]
[x86] Allow address-size overrides for STOS[BWLQ] (PR9385)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199804 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Allow segment and address-size overrides for LODS[BWLQ] (PR9385)
David Woodhouse [Wed, 22 Jan 2014 15:08:08 +0000 (15:08 +0000)]
[x86] Allow segment and address-size overrides for LODS[BWLQ] (PR9385)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199803 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoLoop strength reduce: fix function name.
Tim Northover [Wed, 22 Jan 2014 13:27:00 +0000 (13:27 +0000)]
Loop strength reduce: fix function name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199801 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAVX512: combining setcc and zext is wrong on AVX512
Elena Demikhovsky [Wed, 22 Jan 2014 12:26:19 +0000 (12:26 +0000)]
AVX512: combining setcc and zext is wrong on AVX512
because vector compare instruction puts result in mask register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199798 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMachineCopyPropagation has special logic for removing COPY instructions. It will...
James Molloy [Wed, 22 Jan 2014 09:12:27 +0000 (09:12 +0000)]
MachineCopyPropagation has special logic for removing COPY instructions. It will remove plain COPYs using eraseFromParent(), but if the COPY has imp-defs/imp-uses it will convert it to a KILL, to keep the imp-def around.

This actually totally breaks and causes the machine verifier to cry in several cases, one of which being:

%RAX<def> = COPY %RCX<kill>
%ECX<def> = COPY %EAX<kill>, %RAX<imp-use,kill>

These subregister copies are together identified as noops, so are both removed. However, the second one as it has an imp-use gets converted into a kill:

%ECX<def> = KILL %EAX<kill>, %RAX<imp-use,kill>

As the original COPY has been removed, the verifier goes into tears at the use of undefined EAX and RAX.

There are several hacky solutions to this hacky problem (which is all to do with imp-use/def weirdnesses), but the least hacky I've come up with is to *always* remove COPYs by converting to KILLs. KILLs are no-ops to the code generator so the generated code doesn't change (which is why they were partially used in the first place), but using them also keeps the def/use and imp-def/imp-use chains alive:

%RAX<def> = KILL %RCX<kill>
%ECX<def> = KILL %EAX<kill>, %RAX<imp-use,kill>

The patch passes all test cases including the ones that check the removal of MOVs in this circumstance, along with an extra test I added to check subregister behaviour (which made the machine verifier fall over before my patch).

The patch also adds some DEBUG() statements because the file hadn't got any.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199797 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd unused result attr to the casting templates
Alp Toker [Wed, 22 Jan 2014 07:28:49 +0000 (07:28 +0000)]
Add unused result attr to the casting templates

This helped catch a couple of bugs locally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199793 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[AArch64 NEON] Try to generate CONCAT_VECTOR when lowering BUILD_VECTOR or SHUFFLE_VE...
Kevin Qin [Wed, 22 Jan 2014 06:11:03 +0000 (06:11 +0000)]
[AArch64 NEON] Try to generate CONCAT_VECTOR when lowering BUILD_VECTOR or SHUFFLE_VECTOR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199791 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoReformat a loop for basic hygeine. Self review.
Andrew Trick [Wed, 22 Jan 2014 03:38:55 +0000 (03:38 +0000)]
Reformat a loop for basic hygeine. Self review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199788 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[Sparc] Add support for inline assembly constraints which specify registers by their...
Venkatraman Govindaraju [Wed, 22 Jan 2014 03:18:42 +0000 (03:18 +0000)]
[Sparc] Add support for inline assembly constraints which specify registers by their aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199786 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoWhitespace.
NAKAMURA Takumi [Wed, 22 Jan 2014 03:12:43 +0000 (03:12 +0000)]
Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199785 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix typo
Matt Arsenault [Wed, 22 Jan 2014 02:38:23 +0000 (02:38 +0000)]
Fix typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199784 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[Sparc] Add support for inline assembly constraint 'I'.
Venkatraman Govindaraju [Wed, 22 Jan 2014 01:29:51 +0000 (01:29 +0000)]
[Sparc] Add support for inline assembly constraint 'I'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199781 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoChange createObjectFile to return an ErrorOr.
Rafael Espindola [Wed, 22 Jan 2014 00:14:49 +0000 (00:14 +0000)]
Change createObjectFile to return an ErrorOr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199776 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[Sparc] Do not add PC to _GLOBAL_OFFSET_TABLE_ address to access GOT in absolute...
Venkatraman Govindaraju [Wed, 22 Jan 2014 00:13:18 +0000 (00:13 +0000)]
[Sparc] Do not add PC to _GLOBAL_OFFSET_TABLE_ address to access GOT in absolute code.
Fixes PR#18521

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199775 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[SROA] Fix a bug which could cause the common type finding to return
Chandler Carruth [Tue, 21 Jan 2014 23:16:05 +0000 (23:16 +0000)]
[SROA] Fix a bug which could cause the common type finding to return
inconsistent results for different orderings of alloca slices. The
fundamental issue is that it is just always a mistake to return early
from this function. There is no effective early exit to leverage. This
patch stops trynig to do so and simplifies the code a bit as
a consequence.

Original diagnosis and patch by James Molloy with some name tweaks by me
in part reflecting feedback from Duncan Smith on the mailing list.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199771 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoBe a bit more consistent about using ErrorOr when constructing Binary objects.
Rafael Espindola [Tue, 21 Jan 2014 23:06:54 +0000 (23:06 +0000)]
Be a bit more consistent about using ErrorOr when constructing Binary objects.

The constructors of classes deriving from Binary normally take an error_code
as an argument to the constructor. My original intent was to change them
to have a trivial constructor and move the initial parsing logic to a static
method returning an ErrorOr. I changed my mind because:

* A constructor with an error_code out parameter is extremely convenient from
  the implementation side. We can incrementally construct the object and give
  up when we find an error.
* It is very efficient when constructing on the stack or when there is no
  error. The only inefficient case is where heap allocating and an error is
  found (we have to free the memory).

The result is that this is a much smaller patch. It just standardizes the
create* helpers to return an ErrorOr.

Almost no functionality change: The only difference is that this found that
we were trying to read past the end of COFF import library but ignoring the
error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199770 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoCodeGen: Stop treating vectors as aggregates
Duncan P. N. Exon Smith [Tue, 21 Jan 2014 22:46:46 +0000 (22:46 +0000)]
CodeGen: Stop treating vectors as aggregates

Fix a crash in SjLjEHPrepare::lowerIncomingArguments caused by treating
VectorType like an aggregate.  It's first-class!

<rdar://problem/15854596>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199768 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTweak the spelling of the asserts requirement a bit more. This makes it
Chandler Carruth [Tue, 21 Jan 2014 22:39:19 +0000 (22:39 +0000)]
Tweak the spelling of the asserts requirement a bit more. This makes it
match the (reasonably prevelant) usage in Clang's test suite and so
seems more "canonical".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199767 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix PR18572 - llc crash during GenericScheduler::initPolicy().
Andrew Trick [Tue, 21 Jan 2014 21:27:37 +0000 (21:27 +0000)]
Fix PR18572 - llc crash during GenericScheduler::initPolicy().

Generalized the heuristic that looks at the (very rough) size of the
register file before enabling regpressure tracking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199766 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoForgot to add testcase for r198590
David Majnemer [Tue, 21 Jan 2014 20:39:11 +0000 (20:39 +0000)]
Forgot to add testcase for r198590

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199765 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix pointer info on PPC byval stores
Hal Finkel [Tue, 21 Jan 2014 20:15:58 +0000 (20:15 +0000)]
Fix pointer info on PPC byval stores

For PPC64 SVR (and Darwin), the stores that take byval aggregate parameters
from registers into the stack frame had MachinePointerInfo objects with
incorrect offsets. These offsets are relative to the object itself, not to the
stack frame base.

This fixes self hosting on PPC64 when compiling with -enable-aa-sched-mi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199763 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdding new LTO APIs to parse metadata nodes and extract linker options and
Yunzhong Gao [Tue, 21 Jan 2014 18:31:27 +0000 (18:31 +0000)]
Adding new LTO APIs to parse metadata nodes and extract linker options and
dependent libraries from a bitcode module.

Differential Revision: http://llvm-reviews.chandlerc.com/D2343

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199759 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDon't clobber CMAKE_REQUIRED_FLAGS, it ends up being used in
Chandler Carruth [Tue, 21 Jan 2014 18:09:19 +0000 (18:09 +0000)]
Don't clobber CMAKE_REQUIRED_FLAGS, it ends up being used in
C compilations as well and these flags don't make any sense there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199756 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix VS2012 ID/version check.
Amara Emerson [Tue, 21 Jan 2014 16:41:07 +0000 (16:41 +0000)]
Fix VS2012 ID/version check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199753 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRename these methods to match the style guide.
Rafael Espindola [Tue, 21 Jan 2014 16:09:45 +0000 (16:09 +0000)]
Rename these methods to match the style guide.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199751 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][sched] Split IILoad into II_L[BHWD], II_L[BHW]U, II_L[WD][LR], and II_RESTORE
Daniel Sanders [Tue, 21 Jan 2014 15:21:14 +0000 (15:21 +0000)]
[mips][sched] Split IILoad into II_L[BHWD], II_L[BHW]U, II_L[WD][LR], and II_RESTORE

No functional change since the InstrItinData's have been duplicated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199749 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][sched] Split IIFmoveC1 into II_M[FT]C1, II_M[FT]HC1, II_DM[FT]C1
Daniel Sanders [Tue, 21 Jan 2014 15:03:52 +0000 (15:03 +0000)]
[mips][sched] Split IIFmoveC1 into II_M[FT]C1, II_M[FT]HC1, II_DM[FT]C1

No functional change since the InstrItinData's have been duplicated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199748 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][sched] Split IIFStore into II_S[WD]C1, and II_S[WDU]XC1
Daniel Sanders [Tue, 21 Jan 2014 14:50:20 +0000 (14:50 +0000)]
[mips][sched] Split IIFStore into II_S[WD]C1, and II_S[WDU]XC1

No functional change since the InstrItinData's have been duplicated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199747 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[NVPTX] Add missing patterns for div.approx with immediate denominator
Justin Holewinski [Tue, 21 Jan 2014 14:40:05 +0000 (14:40 +0000)]
[NVPTX] Add missing patterns for div.approx with immediate denominator

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199746 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][sched] Split IIFLoad into II_L[WD]C1, and II_L[WDU]XC1
Daniel Sanders [Tue, 21 Jan 2014 13:59:56 +0000 (13:59 +0000)]
[mips][sched] Split IIFLoad into II_L[WD]C1, and II_L[WDU]XC1

No functional change since the InstrItinData's have been duplicated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199743 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][sched] Removed IIFrecipFsqrtStep. No instructions use it.
Daniel Sanders [Tue, 21 Jan 2014 13:45:41 +0000 (13:45 +0000)]
[mips][sched] Removed IIFrecipFsqrtStep. No instructions use it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199742 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][sched] Renamed II_FsqrtSingle and II_FsqrtDouble to II_SQRT_S and II_SQRT_D...
Daniel Sanders [Tue, 21 Jan 2014 13:36:45 +0000 (13:36 +0000)]
[mips][sched] Renamed II_FsqrtSingle and II_FsqrtDouble to II_SQRT_S and II_SQRT_D respectively

No functional change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199741 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][sched] Renamed II_FdivSingle and II_FdivDouble to II_DIV_S and II_DIV_D respec...
Daniel Sanders [Tue, 21 Jan 2014 13:22:08 +0000 (13:22 +0000)]
[mips][sched] Renamed II_FdivSingle and II_FdivDouble to II_DIV_S and II_DIV_D respectively

No functional change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199738 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][sched] Split IIFmulDouble into II_MUL_D, II_MADD_D, II_MSUB_D, II_NMADD_D...
Daniel Sanders [Tue, 21 Jan 2014 13:07:31 +0000 (13:07 +0000)]
[mips][sched] Split IIFmulDouble into II_MUL_D, II_MADD_D, II_MSUB_D, II_NMADD_D, and II_NMSUB_S

No functional change since the InstrItinData's have been duplicated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199737 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][sched] Split IIFmulSingle into II_MUL_S, II_MADD_S, II_MSUB_S, II_NMADD_S...
Daniel Sanders [Tue, 21 Jan 2014 12:51:44 +0000 (12:51 +0000)]
[mips][sched] Split IIFmulSingle into II_MUL_S, II_MADD_S, II_MSUB_S, II_NMADD_S, and II_NMSUB_S

No functional change since the InstrItinData's have been duplicated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199734 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][sched] Split IIFadd into II_ADD_[DS], II_SUB_[DS]
Daniel Sanders [Tue, 21 Jan 2014 12:38:07 +0000 (12:38 +0000)]
[mips][sched] Split IIFadd into II_ADD_[DS], II_SUB_[DS]

No functional change since the InstrItinData's have been duplicated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199732 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][sched] Split IIFcmp into II_C_CC_[SD]
Daniel Sanders [Tue, 21 Jan 2014 11:42:48 +0000 (11:42 +0000)]
[mips][sched] Split IIFcmp into II_C_CC_[SD]

No functional change since the InstrItinData's have been duplicated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199728 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][sched] Split IIFmove into II_C[FT]C1, II_MOV[FNTZ]_[SD], II_MOV_[SD]
Daniel Sanders [Tue, 21 Jan 2014 11:28:03 +0000 (11:28 +0000)]
[mips][sched] Split IIFmove into II_C[FT]C1, II_MOV[FNTZ]_[SD], II_MOV_[SD]

No functional change since the InstrItinData's have been duplicated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199727 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][sched] Split IIFcvt into II_(ROUND|TRUNC|CEIL|FLOOR|CVT), II_ABS, II_NEG
Daniel Sanders [Tue, 21 Jan 2014 10:56:23 +0000 (10:56 +0000)]
[mips][sched] Split IIFcvt into II_(ROUND|TRUNC|CEIL|FLOOR|CVT), II_ABS, II_NEG

No functional change since the InstrItinData's have been duplicated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199722 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][sched] Split IIslt into II_SLT_SLTU, II_SLTI_SLTIU
Daniel Sanders [Tue, 21 Jan 2014 10:42:13 +0000 (10:42 +0000)]
[mips][sched] Split IIslt into II_SLT_SLTU, II_SLTI_SLTIU

No functional change since the InstrItinData's have been duplicated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199719 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMIPS: mark intrinsics IntrNoMem so all patterns using them are consistent.
Tim Northover [Tue, 21 Jan 2014 10:41:16 +0000 (10:41 +0000)]
MIPS: mark intrinsics IntrNoMem so all patterns using them are consistent.

This is apparently a bit of a white lie (they can affect DSPControl for
overflow etc) but similar to how we currently handle floating-point operations.
When it becomes relevant the whole lot can be reviewed properly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199718 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoChecked return warning from coverity
Renato Golin [Tue, 21 Jan 2014 10:24:35 +0000 (10:24 +0000)]
Checked return warning from coverity

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199716 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix libstdc++4.7 test on Android.
Evgeniy Stepanov [Tue, 21 Jan 2014 09:00:30 +0000 (09:00 +0000)]
Fix libstdc++4.7 test on Android.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199714 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoUse ArrayRef to simplify some code.
Craig Topper [Tue, 21 Jan 2014 07:20:05 +0000 (07:20 +0000)]
Use ArrayRef to simplify some code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199712 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agotools: use 64-bit print specifier
Saleem Abdulrasool [Tue, 21 Jan 2014 04:31:29 +0000 (04:31 +0000)]
tools: use 64-bit print specifier

Try to repair the ARM Cortex-A15 buildbot by using a more appropriate conversion
specifier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199711 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agotools: support decoding ARM EHABI opcodes in readobj
Saleem Abdulrasool [Tue, 21 Jan 2014 02:33:15 +0000 (02:33 +0000)]
tools: support decoding ARM EHABI opcodes in readobj

Add support to llvm-readobj to decode the actual opcodes.  The ARM EHABI opcodes
are a variable length instruction set that describe the operations required for
properly unwinding stack frames.

The primary motivation for this change is to ease the creation of tests for the
ARM EHABI object emission as well as the unwinding directive handling in the ARM
IAS.

Thanks to Logan Chien for an extra test case!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199708 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM IAS: add support for .unwind_raw directive
Saleem Abdulrasool [Tue, 21 Jan 2014 02:33:10 +0000 (02:33 +0000)]
ARM IAS: add support for .unwind_raw directive

This implements the unwind_raw directive for the ARM IAS.  The unwind_raw
directive takes the form of a stack offset value followed by one or more bytes
representing the opcodes to be emitted.  The opcode emitted will interpreted as
if it were assembled by the opcode assembler via the standard unwinding
directives.

Thanks to Logan Chien for an extra test!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199707 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM IAS: support .personalityindex
Saleem Abdulrasool [Tue, 21 Jan 2014 02:33:02 +0000 (02:33 +0000)]
ARM IAS: support .personalityindex

The .personalityindex directive is equivalent to the .personality directive with
the ARM EABI personality with the specific index (0, 1, 2).  Both of these
directives indicate personality routines, so enhance the personality directive
handling to take into account personalityindex.

Bonus fix: flush the UnwindContext at the beginning of a new function.

Thanks to Logan Chien for additional tests!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199706 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.
Kevin Qin [Tue, 21 Jan 2014 01:48:52 +0000 (01:48 +0000)]
[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.

It was commited as r199628 but reverted in r199628 as causing
regression test failed. It's because of old vervsion of patch
I used to commit. Sorry for mistake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199704 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd operator!= for FoldingSetNodeID and FoldingSetNodeIDRef. Implementation in
Nick Lewycky [Tue, 21 Jan 2014 01:29:37 +0000 (01:29 +0000)]
Add operator!= for FoldingSetNodeID and FoldingSetNodeIDRef. Implementation in
the header forwards to operator== which is not in the header.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199702 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTweak the MCExternalSymbolizer to not use the SymbolLookUp() call back
Kevin Enderby [Tue, 21 Jan 2014 00:23:17 +0000 (00:23 +0000)]
Tweak the MCExternalSymbolizer to not use the SymbolLookUp() call back
to not guess at a symbol name in some cases.

The problem is that in object files assembled starting at address 0, when
trying to symbolicate something that starts like this:

% cat x.s
_t1:
vpshufd $0x0, %xmm1, %xmm0

the symbolic disassembly can end up like this:

% otool -tV x.o
x.o:
(__TEXT,__text) section
_t1:
0000000000000000 vpshufd $_t1, %xmm1, %xmm0

Which is in this case produced incorrect symbolication.

But it is useful in some cases to use the SymbolLookUp() call back
to guess at some immediate values.  For example one like this
that does not have an external relocation entry:

% cat y.s
_t1:
movl $_d1, %eax
.data
_d1: .long 0

% clang -c -arch i386 y.s

% otool -tV y.o
y.o:
(__TEXT,__text) section
_t1:
0000000000000000 movl $_d1, %eax

% otool -rv y.o
y.o:
Relocation information (__TEXT,__text) 1 entries
address  pcrel length extern type    scattered symbolnum/value
00000001 False long   False  VANILLA False     2 (__DATA,__data)

So the change is based on it is not likely that an immediate Value
coming from an instruction field of a width of 1 byte, other than branches
and items with relocation, are not likely symbol addresses.

With the change the first case above simply becomes:

% otool -tV x.o
x.o:
(__TEXT,__text) section
_t1:
0000000000000000 vpshufd $0x0, %xmm1, %xmm0

and the second case continues to work as expected.

rdar://14863405

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199698 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTo allow the X86 verbose assembly to print its informative comments
Kevin Enderby [Tue, 21 Jan 2014 00:18:51 +0000 (00:18 +0000)]
To allow the X86 verbose assembly to print its informative comments
when used with symbolic disassembly, add a check that the operand
is an immediate and has not been symbolicated to MCExpr operand.

I’m trying to enable the â€˜C’ disassembly API option
LLVMDisassembler_Option_SetInstrComments for darwin’s
otool(1) that uses the llvm disassembler API.  The problem is
that the disassembler API can change an immediate operand to
an MCExpr operand if it symbolicates it with the call backs.
And if it does the code in llvm::EmitAnyX86InstComments()
will crash when it assumes these operands are immediates.

The fix for this is very straight forward to just protect the call
to getImm() with a check of isImm().  So if the immediate for
an instruction is symbolicated it simply doesn’t get the X86
verbose assembly comments:

% otool -tV test_asm.o
test_asm.o:
(__TEXT,__text) section
_t1:
0000000000000000 vpshufd $_t1, %xmm1, %xmm0
0000000000000005 retq
0000000000000006 nopw %cs:_t1(%rax,%rax)
_t2:
0000000000000010 vpshufd $-0x1, %xmm0, %xmm0     ## xmm0 = xmm0[3,3,3,3]
0000000000000015 retq
0000000000000016 nopw %cs:_t1(%rax,%rax)
_t3:
0000000000000020 vpshufd $_t1, %xmm1, %xmm0
0000000000000025 retq
0000000000000026 nopw %cs:_t1(%rax,%rax)
_t4:
0000000000000030 vpshufd $0x2d, %xmm0, %xmm0     ## xmm0 = xmm0[1,3,2,0]
0000000000000035 retq

The fact that the immediate $0x0 is being symbolicated at
all in this case is a different problem which my next patch
will address.

rdar://10989286

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199697 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoUpdate StackProtector when coloring merges stack slots
Hal Finkel [Mon, 20 Jan 2014 19:49:14 +0000 (19:49 +0000)]
Update StackProtector when coloring merges stack slots

StackProtector keeps a ValueMap of alloca instructions to layout kind tags for
use by PEI and other later passes. When stack coloring replaces one alloca with
a bitcast to another one, the key replacement in this map does not work.
Instead, provide an interface to manage this updating directly. This seems like
an improvement over the old behavior, where the layout map would not get
updated at all when the stack slots were merged. In practice, however, there is
likely no observable difference because PEI only did anything special with
'large array' kinds, and if one large array is merged with another, than the
replacement should already have been a large array.

This is an attempt to unbreak the clang-x86_64-darwin11-RA builder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199684 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[X86] Teach how to combine a vselect into a movss/movsd
Andrea Di Biagio [Mon, 20 Jan 2014 19:35:22 +0000 (19:35 +0000)]
[X86] Teach how to combine a vselect into a movss/movsd

Add target specific rules for combining vselect dag nodes into movss/movsd
when possible.

If the vector type of the vselect dag node in input is either MVT::v4i13 or
MVT::v4f32, then try to fold according to rules:

  1) fold (vselect (build_vector (0, -1, -1, -1)), A, B) -> (movss A, B)
  2) fold (vselect (build_vector (-1, 0, 0, 0)), A, B) -> (movss B, A)

If the vector type of the vselect dag node in input is either MVT::v2i64 or
MVT::v2f64 (and we have SSE2), then try to fold according to rules:

  3) fold (vselect (build_vector (0, -1)), A, B) -> (movsd A, B)
  4) fold (vselect (build_vector (-1, 0)), A, B) -> (movsd B, A)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199683 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebug info: On ARM ensure that all __TEXT sections come before the
Adrian Prantl [Mon, 20 Jan 2014 19:15:59 +0000 (19:15 +0000)]
Debug info: On ARM ensure that all __TEXT sections come before the
optional DWARF sections, so compiling with -g does not result in
different code being generated for PC-relative loads.

This is reapplying a diet r197922 (__TEXT-only).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199681 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert "Debug info: On ARM ensure that the data sections come before the"
Adrian Prantl [Mon, 20 Jan 2014 19:15:55 +0000 (19:15 +0000)]
Revert "Debug info: On ARM ensure that the data sections come before the"
Cut back on the cargo cult. The order of __DATA sections doesn't affect
generated code.

This reverts commit r197922.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199680 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAllow SMUL_LOHI and UMUL_LOHI to be narrow to MUL on targets where MUL is Custom...
Owen Anderson [Mon, 20 Jan 2014 18:41:34 +0000 (18:41 +0000)]
Allow SMUL_LOHI and UMUL_LOHI to be narrow to MUL on targets where MUL is Custom rather than Legal.  Even if the target is doing some kind of expansion for MUL, it's pretty much guaranteed to be more efficent than whatever it does for SMUL_LOHI or UMUL_LOHI!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199678 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRemove the useless pseudo instructions VDUPfdf and VDUPfqf, replacing them with patte...
James Molloy [Mon, 20 Jan 2014 17:14:48 +0000 (17:14 +0000)]
Remove the useless pseudo instructions VDUPfdf and VDUPfqf, replacing them with patterns to match VDUPLN.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199675 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[CMake] LLVMProcessSources.cmake: Add include(CMakeParseArguments).
NAKAMURA Takumi [Mon, 20 Jan 2014 17:05:49 +0000 (17:05 +0000)]
[CMake] LLVMProcessSources.cmake: Add include(CMakeParseArguments).

I didn't realize that cmake_parse_arguments() would require explicit inclusion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199674 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoWhitespace.
NAKAMURA Takumi [Mon, 20 Jan 2014 15:47:15 +0000 (15:47 +0000)]
Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199667 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix misched-aa-colored.ll to require asserts (trying again)
Hal Finkel [Mon, 20 Jan 2014 14:15:28 +0000 (14:15 +0000)]
Fix misched-aa-colored.ll to require asserts (trying again)

Perhaps it needs to be in caps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199661 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix misched-aa-colored.ll to require asserts.
Hal Finkel [Mon, 20 Jan 2014 14:09:34 +0000 (14:09 +0000)]
Fix misched-aa-colored.ll to require asserts.

-misched=shuffle is NDEBUG only. Maybe we should change that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199659 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoUpdate IR when merging slots in stack coloring
Hal Finkel [Mon, 20 Jan 2014 14:03:16 +0000 (14:03 +0000)]
Update IR when merging slots in stack coloring

The way that stack coloring updated MMOs when merging stack slots, while
correct, is suboptimal, and is incompatible with the use of AA during
instruction scheduling. The solution, which involves the use of const_cast (and
more importantly, updating the IR from within an MI-level pass), obviously
requires some explanation:

When the stack coloring pass was originally committed, the code in
ScheduleDAGInstrs::buildSchedGraph tracked possible alias sets by using
GetUnderlyingObject, and all load/store and store/store memory control
dependencies where added between SUs at the object level (where only one
object, that returned by GetUnderlyingObject, was used to identify the object
associated with each MMO). When stack coloring merged stack slots, it would
replace MMOs derived from the remapped alloca with the alloca with which the
remapped alloca was being replaced. Because ScheduleDAGInstrs only used single
objects, and tracked alias sets at the object level, this was a fine solution.

In r169744, (Andy and) I updated the code in ScheduleDAGInstrs to use
GetUnderlyingObjects, and track alias sets using, potentially, multiple
underlying objects for each MMO. This was done, primarily, to provide the
ability to look through PHIs, and provide better scheduling for
induction-variable-dependent loads and stores inside loops. At this point, the
MMO-updating code in stack coloring became suboptimal, because it would clear
the MMOs for (i.e. completely pessimize) all instructions for which r169744
might help in scheduling. Updating the IR directly is the simplest fix for this
(and the one with, by far, the least compile-time impact), but others are
possible (we could give each MMO a small vector of potential values, or make
use of a remapping table, constructed from MFI, inside ScheduleDAGInstrs).

Unfortunately, replacing all MMO values derived from the remapped alloca with
the base replacement alloca fundamentally breaks our ability to use AA during
instruction scheduling (which is critical to performance on some targets). The
reason is that the original MMO might have had an offset (either constant or
dynamic) from the base remapped alloca, and that offset is not present in the
updated MMO. One possible way around this would be to use
GetPointerBaseWithConstantOffset, and update not only the MMO's value, but also
its offset based on the original offset. Unfortunately, this solution would
only handle constant offsets, and for safety (because AA is not completely
restricted to deducing relationships with constant offsets), we would need to
clear all MMOs without constant offsets over the entire function. This would be
an even worse pessimization than the current single-object restriction. Any
other solution would involve passing around a vector of remapped allocas, and
teaching AA to use it, introducing additional complexity and overhead into AA.

Instead, when remapping an alloca, we replace all IR uses of that alloca as
well (optionally inserting a bitcast as necessary). This is even more efficient
that the old MMO-updating code in the stack coloring pass (because it removes
the need to call GetUnderlyingObject on all MMO values), removes the
single-object pessimization in the default configuration, and enables the
correct use of AA during instruction scheduling (all without any additional
overhead).

LLVM now no longer miscompiles itself on x86_64 when using -enable-misched
-enable-aa-sched-mi -misched-bottomup=0 -misched-topdown=0 -misched=shuffle!
Fixed PR18497.

Because the alloca replacement is now done at the IR level, unless the MMO
directly refers to the remapped alloca, the change cannot be seen at the MI
level. As a result, there is no good way to fix test/CodeGen/X86/pr14090.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199658 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTrack multiple stores per object when using AA in ScheduleDAGInstrs
Hal Finkel [Mon, 20 Jan 2014 14:03:02 +0000 (14:03 +0000)]
Track multiple stores per object when using AA in ScheduleDAGInstrs

When using AA to break false chain dependencies, we need to track multiple
stores per object in ScheduleDAGInstrs. Historically, we tracked potential alias
chains at the object level, and so all loads of an object would retain
dependencies on any store to that object. With AA, however, this is not
sufficient: non-overlapping stores and loads to the same object all need to be
tested for dependencies separately, we cannot only test all loads to an object
against only the last store (see PR18497 for an explicit example).

To mitigate any unwelcome compile-time impact when not using AA, only one store
is kept in the list per object when not using AA.

This, along with a stack coloring change to come shortly, will provide a test
case, fix PR18497 (and allow LLVM to compile itself using -enable-aa-sched-mi
on x86-64).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199657 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Fix disassembly of MOV16ao16 et al.
David Woodhouse [Mon, 20 Jan 2014 12:02:53 +0000 (12:02 +0000)]
[x86] Fix disassembly of MOV16ao16 et al.

The addition of IC_OPSIZE_ADSIZE in r198759 wasn't quite complete. It
also turns out to have been unnecessary. The disassembler handles the
AdSize prefix for itself, and doesn't care about the difference between
(e.g.) MOV8ao8 and MOB8ao8_16 definitions. So just let them coexist and
don't worry about it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199654 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Fix 16-bit disassembly of JCXZ/JECXZ
David Woodhouse [Mon, 20 Jan 2014 12:02:48 +0000 (12:02 +0000)]
[x86] Fix 16-bit disassembly of JCXZ/JECXZ

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199653 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Rename MOVSD/STOSD/LODSD/OUTSD to MOVSL/STOSL/LODSL/OUTSL
David Woodhouse [Mon, 20 Jan 2014 12:02:44 +0000 (12:02 +0000)]
[x86] Rename MOVSD/STOSD/LODSD/OUTSD to MOVSL/STOSL/LODSL/OUTSL

The disassembler has a special case for 'L' vs. 'W' in its heuristic for
checking for 32-bit and 16-bit equivalents. We could expand the heuristic,
but better just to be consistent in using the 'L' suffix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199652 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Fix disassembly of callw instruction
David Woodhouse [Mon, 20 Jan 2014 12:02:40 +0000 (12:02 +0000)]
[x86] Fix disassembly of callw instruction

Not quite sure why this was marked isAsmParserOnly, but it means that the
disassembler can't see it either.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199651 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Fix 16-bit handling of OpSize bit
David Woodhouse [Mon, 20 Jan 2014 12:02:35 +0000 (12:02 +0000)]
[x86] Fix 16-bit handling of OpSize bit

When disassembling in 16-bit mode the meaning of the OpSize bit is
inverted. Instructions found in the IC_OPSIZE context will actually
*not* have the 0x66 prefix, and instructions in the IC context will
have the 0x66 prefix. Make use of the existing special-case handling
for the 0x66 prefix being in the wrong place, to cope with this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199650 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Infer disassembler mode from SubtargetInfo feature bits
David Woodhouse [Mon, 20 Jan 2014 12:02:31 +0000 (12:02 +0000)]
[x86] Infer disassembler mode from SubtargetInfo feature bits

Aside from cleaning up the code, this also adds support for the -code16
environment and actually enables the MODE_16BIT mode that was previously
not accessible.

There is no point adding any testing for 16-bit yet though; basically
nothing will work because we aren't handling the OpSize prefix correctly
for 16-bit mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199649 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[x86] Support i386-*-*-code16 triple for emitting 16-bit code
David Woodhouse [Mon, 20 Jan 2014 12:02:25 +0000 (12:02 +0000)]
[x86] Support i386-*-*-code16 triple for emitting 16-bit code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199648 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[PM] Wire up the Verifier for the new pass manager and connect it to the
Chandler Carruth [Mon, 20 Jan 2014 11:34:08 +0000 (11:34 +0000)]
[PM] Wire up the Verifier for the new pass manager and connect it to the
various opt verifier commandline options.

Mostly mechanical wiring of the verifier to the new pass manager.
Exercises one of the more unusual aspects of it -- a pass can be either
a module or function pass interchangably. If this is ever problematic,
we can make things more constrained, but for things like the verifier
where there is an "obvious" applicability at both levels, it seems
convenient.

This is the next-to-last piece of basic functionality left to make the
opt commandline driving of the new pass manager minimally functional for
testing and further development. There is still a lot to be done there
(notably the factoring into .def files to kill the current boilerplate
code) but it is relatively uninteresting. The only interesting bit left
for minimal functionality is supporting the registration of analyses.
I'm planning on doing that on top of the .def file switch mostly because
the boilerplate for the analyses would be significantly worse.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199646 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM: add tlsldo relocation
Kai Nacke [Mon, 20 Jan 2014 11:00:40 +0000 (11:00 +0000)]
ARM: add tlsldo relocation

Add support for the symbol(tlsldo) relocation. This is required in order to
solve PR18554.

Reviewed by R. Golin, A. Korobeynikov.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199644 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[CMake] llvm_process_sources: Introduce a parameter, ADDITIONAL_HEADERS.
NAKAMURA Takumi [Mon, 20 Jan 2014 10:20:23 +0000 (10:20 +0000)]
[CMake] llvm_process_sources: Introduce a parameter, ADDITIONAL_HEADERS.

ADDITIONAL_HEADERS is intended to add header files for IDEs as hint.

For example:
  add_llvm_library(LLVMSupport
    Host.cpp
    ADDITIONAL_HEADERS
      Unix/Host.inc
      Windows/Host.inc
    )

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199639 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[ARM] Do not generate Tag_DIV_use=AllowDIVExt when hardware div is non-optional:...
Artyom Skrobov [Mon, 20 Jan 2014 10:18:42 +0000 (10:18 +0000)]
[ARM] Do not generate Tag_DIV_use=AllowDIVExt when hardware div is non-optional: it should have the default value of AllowDIVIfExists

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199638 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert my commit in r199620 that added sections about namespaces to the
Chandler Carruth [Mon, 20 Jan 2014 10:15:32 +0000 (10:15 +0000)]
Revert my commit in r199620 that added sections about namespaces to the
coding standards, and instead fix the existing section.

Thanks to Daniel Jasper for pointing out we already had a section
devoted to this topic. Instead of adding sections, just hack on this
section some. Also fix the example in the anonymous namespace section
below it to agree with the new advice.

As a re-cap, this switches the LLVM preferred style to never indent
namespaces. Having two approaches just led to endless (and utterly
pointless) debates about what was "small enough". This wasn't helping
anyone. The no-indent rule is easy to understand and doesn't really make
anything harder to read. Moreover, with tools like clang-format it is
considerably nicer to have simple consistent rules.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199637 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert r199628: "[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT."
Chandler Carruth [Mon, 20 Jan 2014 08:18:01 +0000 (08:18 +0000)]
Revert r199628: "[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT."

This test fails the newly added regression tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199631 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix a DenseMap iterator invalidation bug causing lots of crashes when
Chandler Carruth [Mon, 20 Jan 2014 08:07:07 +0000 (08:07 +0000)]
Fix a DenseMap iterator invalidation bug causing lots of crashes when
type units were enabled. The crux of the issue is that the
addDwarfTypeUnitType routine can end up being indirectly recursive. In
this case, the reference into the dense map (TU) became invalid by the
time we popped all the way back and used it to add the DIE type
signature.

Instead, use early return in the case where we can bypass the recursive
step and creating a type unit. Then use the pointer to the new type unit
to set up the DIE type signature in the case where we have to.

I tried really hard to reduce a testcase for this, but it's really
annoying. You have to get this to be mid-recursion when the densemap
grows. Even if we got a test case for this today, it'd be very unlikely
to continue exercising this pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199630 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix all the remaining lost-fast-math-flags bugs I've been able to find. The most...
Owen Anderson [Mon, 20 Jan 2014 07:44:53 +0000 (07:44 +0000)]
Fix all the remaining lost-fast-math-flags bugs I've been able to find.  The most important of these are cases in the generic logic for combining BinaryOperators.
This logic hadn't been updated to handle FastMathFlags, and it took me a while to detect it because it doesn't show up in a simple search for CreateFAdd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199629 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.
Kevin Qin [Mon, 20 Jan 2014 07:32:26 +0000 (07:32 +0000)]
[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199628 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMC: whitespace
Saleem Abdulrasool [Mon, 20 Jan 2014 04:10:11 +0000 (04:10 +0000)]
MC: whitespace

Remove hard tabs in favour of spaces.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199624 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[PM] Fix a contradiction in the comments noticed by Anders.
Chandler Carruth [Mon, 20 Jan 2014 02:32:02 +0000 (02:32 +0000)]
[PM] Fix a contradiction in the comments noticed by Anders.

Have I mentioned that functions returning true on error and false on
success are confusing? They're more confusing when their name is
"verify". Anyways...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199622 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[AArch64 NEON] Accept both #0.0 and #0 for comparing with floating point zero in...
Kevin Qin [Mon, 20 Jan 2014 02:14:05 +0000 (02:14 +0000)]
[AArch64 NEON] Accept both #0.0 and #0 for comparing with floating point zero in asm parser.

For FCMEQ, FCMGE, FCMGT, FCMLE and FCMLT, floating point zero will be
printed as #0.0 instead of #0. To support the history codes using #0,
we consider to let asm parser accept both #0.0 and #0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199621 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd some wording to the coding standards to say how to indent namespaces
Chandler Carruth [Mon, 20 Jan 2014 01:40:43 +0000 (01:40 +0000)]
Add some wording to the coding standards to say how to indent namespaces
(and to mention namespace ending comments). This is based on a quick
discussion on the developer mailing list where there was essentially no
objections to a simple and consistent rule. This should avoid future
debates about whether or not a namespace is "big enough" to indent. It
also matches clang-format's current behavior with LLVM source code which
hasn't really seen any opposition in code reviews that I spot checked.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199620 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMove the retrieval of VT after all of the early exits from PerformOrCombine that...
Michael Gottesman [Sun, 19 Jan 2014 21:06:00 +0000 (21:06 +0000)]
Move the retrieval of VT after all of the early exits from PerformOrCombine that do not use VT. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199612 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[APInt] Fix nearestLogBase2 to return correct answers for very large APInt and APInt...
Michael Gottesman [Sun, 19 Jan 2014 20:33:48 +0000 (20:33 +0000)]
[APInt] Fix nearestLogBase2 to return correct answers for very large APInt and APInt with a bitwidth of 1.

I also improved the comments, added some more tests, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199610 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[APInt] Fixed bug where APInt(UINT32_MAX, 0) would blow up when being constructed.
Michael Gottesman [Sun, 19 Jan 2014 20:33:38 +0000 (20:33 +0000)]
[APInt] Fixed bug where APInt(UINT32_MAX, 0) would blow up when being constructed.

This was due to arithmetic overflow in the getNumBits() computation. Now we
cast BitWidth to a uint64_t so that does not occur during the computation. After
the computation is complete, the uint64_t is truncated when the function
returns.

I know that this is not something that is likely to happen, but it *IS* a valid
input and we should not blow up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199609 91177308-0d34-0410-b5e6-96231b3b80d8