Chandler Carruth [Fri, 14 Sep 2012 09:30:33 +0000 (09:30 +0000)]
Speculative change to try to fix older GCC versions that can't handle
the injected class name of a dependent base class here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163884
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Chandler Carruth [Fri, 14 Sep 2012 09:22:59 +0000 (09:22 +0000)]
Introduce a new SROA implementation.
This is essentially a ground up re-think of the SROA pass in LLVM. It
was initially inspired by a few problems with the existing pass:
- It is subject to the bane of my existence in optimizations: arbitrary
thresholds.
- It is overly conservative about which constructs can be split and
promoted.
- The vector value replacement aspect is separated from the splitting
logic, missing many opportunities where splitting and vector value
formation can work together.
- The splitting is entirely based around the underlying type of the
alloca, despite this type often having little to do with the reality
of how that memory is used. This is especially prevelant with unions
and base classes where we tail-pack derived members.
- When splitting fails (often due to the thresholds), the vector value
replacement (again because it is separate) can kick in for
preposterous cases where we simply should have split the value. This
results in forming i1024 and i2048 integer "bit vectors" that
tremendously slow down subsequnet IR optimizations (due to large
APInts) and impede the backend's lowering.
The new design takes an approach that fundamentally is not susceptible
to many of these problems. It is the result of a discusison between
myself and Duncan Sands over IRC about how to premptively avoid these
types of problems and how to do SROA in a more principled way. Since
then, it has evolved and grown, but this remains an important aspect: it
fixes real world problems with the SROA process today.
First, the transform of SROA actually has little to do with replacement.
It has more to do with splitting. The goal is to take an aggregate
alloca and form a composition of scalar allocas which can replace it and
will be most suitable to the eventual replacement by scalar SSA values.
The actual replacement is performed by mem2reg (and in the future
SSAUpdater).
The splitting is divided into four phases. The first phase is an
analysis of the uses of the alloca. This phase recursively walks uses,
building up a dense datastructure representing the ranges of the
alloca's memory actually used and checking for uses which inhibit any
aspects of the transform such as the escape of a pointer.
Once we have a mapping of the ranges of the alloca used by individual
operations, we compute a partitioning of the used ranges. Some uses are
inherently splittable (such as memcpy and memset), while scalar uses are
not splittable. The goal is to build a partitioning that has the minimum
number of splits while placing each unsplittable use in its own
partition. Overlapping unsplittable uses belong to the same partition.
This is the target split of the aggregate alloca, and it maximizes the
number of scalar accesses which become accesses to their own alloca and
candidates for promotion.
Third, we re-walk the uses of the alloca and assign each specific memory
access to all the partitions touched so that we have dense use-lists for
each partition.
Finally, we build a new, smaller alloca for each partition and rewrite
each use of that partition to use the new alloca. During this phase the
pass will also work very hard to transform uses of an alloca into a form
suitable for promotion, including forming vector operations, speculating
loads throguh PHI nodes and selects, etc.
After splitting is complete, each newly refined alloca that is
a candidate for promotion to a scalar SSA value is run through mem2reg.
There are lots of reasonably detailed comments in the source code about
the design and algorithms, and I'm going to be trying to improve them in
subsequent commits to ensure this is well documented, as the new pass is
in many ways more complex than the old one.
Some of this is still a WIP, but the current state is reasonbly stable.
It has passed bootstrap, the nightly test suite, and Duncan has run it
successfully through the ACATS and DragonEgg test suites. That said, it
remains behind a default-off flag until the last few pieces are in
place, and full testing can be done.
Specific areas I'm looking at next:
- Improved comments and some code cleanup from reviews.
- SSAUpdater and enabling this pass inside the CGSCC pass manager.
- Some datastructure tuning and compile-time measurements.
- More aggressive FCA splitting and vector formation.
Many thanks to Duncan Sands for the thorough final review, as well as
Benjamin Kramer for lots of review during the process of writing this
pass, and Daniel Berlin for reviewing the data structures and algorithms
and general theory of the pass. Also, several other people on IRC, over
lunch tables, etc for lots of feedback and advice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163883
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Duncan Sands [Fri, 14 Sep 2012 09:00:11 +0000 (09:00 +0000)]
Remove silly dead store. Patch by Ettl Martin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163882
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Craig Topper [Fri, 14 Sep 2012 08:33:11 +0000 (08:33 +0000)]
Allow the second opcode info table to be 8, 16, or 32-bits as needed to represent additional fragments. This recovers some space on ATT X86 syntax and PowerPC which only need 40-bits instead of 48-bits. This also increases ARM to 64-bits to fully encode all of its operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163880
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Craig Topper [Fri, 14 Sep 2012 06:37:49 +0000 (06:37 +0000)]
Reduce size of register name index tables by using uint16_t for all in tree targets. If more than 16-bits are needed for any out of tree targets, code will detect and use uint32_t instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163878
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Andrew Trick [Fri, 14 Sep 2012 06:18:55 +0000 (06:18 +0000)]
misched: Generic tablegen classes for the new machine model.
This is mostly documentation for the new machine model. It is designed
to be flexible, easy to incrementally refine for a subtarget, and
provide all the information that MachineScheduler will need.
If all goes well, I will follow up with an example of the new model in
use for ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163877
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Andrew Trick [Fri, 14 Sep 2012 06:18:52 +0000 (06:18 +0000)]
comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163876
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Andrew Trick [Fri, 14 Sep 2012 06:18:50 +0000 (06:18 +0000)]
comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163875
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Akira Hatanaka [Fri, 14 Sep 2012 03:21:56 +0000 (03:21 +0000)]
mips16 fixes.
1. Add MoveR3216
2. Correct spelling for Move32R16
Patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163869
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Galina Kistanova [Thu, 13 Sep 2012 23:51:08 +0000 (23:51 +0000)]
Patch by Sean Silva!
The patch converts the "How to add a builder" document over to reStructuredText..
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163860
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Eric Christopher [Thu, 13 Sep 2012 23:24:02 +0000 (23:24 +0000)]
Fix both the test for zero and what we do if we have a zero for
umulo legalization.
Fixes PR13839
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163856
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Eric Christopher [Thu, 13 Sep 2012 23:23:58 +0000 (23:23 +0000)]
Reformat, remove a couple unused variables and move some variables
closer to where they're needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163855
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Jim Grosbach [Thu, 13 Sep 2012 23:11:31 +0000 (23:11 +0000)]
Assembler: Darwin variables defined via .set are no-dead-strip.
For gas compatibility.
rdar://
12219394
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163854
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Jim Grosbach [Thu, 13 Sep 2012 23:11:25 +0000 (23:11 +0000)]
MachO: Correctly mark symbol-difference variables as N_ABS.
.set a, b - c + CONSTANT
d = b - c + CONSTANT
Both 'a' and 'd' should be marked as absolute symbols (N_ABS).
rdar://
12219394
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163853
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Dan Gohman [Thu, 13 Sep 2012 21:51:01 +0000 (21:51 +0000)]
Handle the new !tbaa.struct metadata tags when converting a memcpy into scalar
loads and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163844
91177308-0d34-0410-b5e6-
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Jim Grosbach [Thu, 13 Sep 2012 21:50:06 +0000 (21:50 +0000)]
Better const handling for RuntimeDyld and MCJIT.
mapSectionAddress() wasn't consistent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163843
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Richard Smith [Thu, 13 Sep 2012 21:18:18 +0000 (21:18 +0000)]
Fix some code which is invalid in C++11: an expression of enumeration type
can't be used as a non-type template argument of type bool.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163840
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Manman Ren [Thu, 13 Sep 2012 20:47:48 +0000 (20:47 +0000)]
AsmWriterEmitter: OpInfo2 should be unsigned 16-bit.
Fix an issue in r163814.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163837
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Michael Liao [Thu, 13 Sep 2012 20:30:16 +0000 (20:30 +0000)]
Fix comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163835
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Dmitri Gribenko [Thu, 13 Sep 2012 20:28:31 +0000 (20:28 +0000)]
Fix documentation: parameter being documented was removed in r98220.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163834
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Michael Liao [Thu, 13 Sep 2012 20:24:54 +0000 (20:24 +0000)]
Add wider vector/integer support for PR12312
- Enhance the fix to PR12312 to support wider integer, such as 256-bit
integer. If more than 1 fully evaluated vectors are found, POR them
first followed by the final PTEST.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163832
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Michael Liao [Thu, 13 Sep 2012 19:58:21 +0000 (19:58 +0000)]
Enhance type legalization on bitcast from vector to integer
- Find a legal vector type before casting and extracting element from it.
- As the new vector type may have more than 2 elements, build the final
hi/lo pair by BFS pairing them from bottom to top.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163830
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Jakob Stoklund Olesen [Thu, 13 Sep 2012 19:47:45 +0000 (19:47 +0000)]
Fix test case to avoid PIC magic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163827
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Jakob Stoklund Olesen [Thu, 13 Sep 2012 18:31:27 +0000 (18:31 +0000)]
Fix the TCRETURNmi64 bug differently.
Add a PatFrag to match X86tcret using 6 fixed registers or less. This
avoids folding loads into TCRETURNmi64 using 7 or more volatile
registers.
<rdar://problem/
12282281>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163819
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Dan Gohman [Thu, 13 Sep 2012 18:19:06 +0000 (18:19 +0000)]
Extract code for reducing a type to a single value type into a helper function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163817
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Dan Gohman [Thu, 13 Sep 2012 17:56:17 +0000 (17:56 +0000)]
Define an official slot for the new !tbaa.struct metadata tag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163815
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Manman Ren [Thu, 13 Sep 2012 17:43:46 +0000 (17:43 +0000)]
AsmWriterEmitter: increase the number of bits for OpcodeInfo from 32-bit to
48-bit if necessary, in order to reduce the generated code size.
We have 900 cases not covered by OpcodeInfo in ATT AsmWriter and more in Intel
AsmWriter and ARM AsmWriter.
This patch reduced the clang Release build size by 50k, running on a Mac Pro.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163814
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Akira Hatanaka [Thu, 13 Sep 2012 17:12:37 +0000 (17:12 +0000)]
mips16: When copying operands in a conditional branch instruction, allow for
immediate operands to be copied.
Patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163811
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Jakob Stoklund Olesen [Thu, 13 Sep 2012 16:52:17 +0000 (16:52 +0000)]
Revert r163761 "Don't fold indexed loads into TCRETURNmi64."
The patch caused "Wrong topological sorting" assertions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163810
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Benjamin Kramer [Thu, 13 Sep 2012 16:29:49 +0000 (16:29 +0000)]
MemCpyOpt: When forming a memset from stores also take GEP constexprs into account.
This is common when storing to global variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163809
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Nadav Rotem [Thu, 13 Sep 2012 16:27:32 +0000 (16:27 +0000)]
Fix an 80 char line limit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163808
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Nadav Rotem [Thu, 13 Sep 2012 15:46:30 +0000 (15:46 +0000)]
Rename the flag which protects from escaped allocas, which may come from bugs in user code or in the compiler. Also, dont assert if the protection is not enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163807
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Micah Villmow [Thu, 13 Sep 2012 15:24:43 +0000 (15:24 +0000)]
The current implementation does not allow more than 32 types to be properly handled with target lowering. This doubles the size to 64bit types and easily allows extension to more types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163806
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Micah Villmow [Thu, 13 Sep 2012 15:11:12 +0000 (15:11 +0000)]
Unify the emission of the calling conventions into a single function to reduce code duplication.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163805
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Silviu Baranga [Thu, 13 Sep 2012 15:05:10 +0000 (15:05 +0000)]
This patch introduces A15 as a target in LLVM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163803
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Nadav Rotem [Thu, 13 Sep 2012 14:54:28 +0000 (14:54 +0000)]
Fix a dagcombine optimization. The optimization attempts to optimize a bitcast of fneg to integers
by xoring the high-bit. This fails if the source operand is a vector because we need to negate
each of the elements in the vector.
Fix rdar://
12281066 PR13813.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163802
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Nadav Rotem [Thu, 13 Sep 2012 14:51:00 +0000 (14:51 +0000)]
Fix a typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163801
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Bill Wendling [Thu, 13 Sep 2012 14:32:30 +0000 (14:32 +0000)]
Use Nick's suggestion of storing a large NULL into the GV instead of memset, which requires TargetData.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163799
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Nadav Rotem [Thu, 13 Sep 2012 12:38:37 +0000 (12:38 +0000)]
Stack Coloring: We have code that checks that all of the uses of allocas
are within the lifetime zone. Sometime legitimate usages of allocas are
hoisted outside of the lifetime zone. For example, GEPS may calculate the
address of a member of an allocated struct. This commit makes sure that
we only check (abort regions or assert) for instructions that read and write
memory using stack frames directly. Notice that by allowing legitimate
usages outside the lifetime zone we also stop checking for instructions
which use derivatives of allocas. We will catch less bugs in user code
and in the compiler itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163791
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Dmitri Gribenko [Thu, 13 Sep 2012 12:34:29 +0000 (12:34 +0000)]
Fix Doxygen issues:
* wrap code blocks in \code ... \endcode;
* refer to parameter names in paragraphs correctly (\arg is not what most
people want -- it starts a new paragraph).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163790
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Dmitri Gribenko [Thu, 13 Sep 2012 11:42:30 +0000 (11:42 +0000)]
Fix a doxygen issue: these examples are supposed to be displayed preformatted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163787
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Craig Topper [Thu, 13 Sep 2012 07:26:59 +0000 (07:26 +0000)]
Fix function name in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163783
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Nick Lewycky [Thu, 13 Sep 2012 07:01:25 +0000 (07:01 +0000)]
Fix typo in comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163782
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Craig Topper [Thu, 13 Sep 2012 05:45:42 +0000 (05:45 +0000)]
Add a new compression type to ModRM table that detects when the memory modRM byte represent 8 instructions and the reg modRM byte represents up to 64 instructions. Reduces modRM table from 43k entreis to 25k entries. Based on a patch from Manman Ren.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163774
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Jim Grosbach [Thu, 13 Sep 2012 01:24:37 +0000 (01:24 +0000)]
MCJIT: relocation addends encoded in the target aren't quite so easy.
The assumption that the target address for the relocation will always be
sizeof(intptr_t) and will always contain an addend for the relocation
value is very wrong. Default to no addend for now.
rdar://
12157052
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163765
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Jim Grosbach [Thu, 13 Sep 2012 01:24:35 +0000 (01:24 +0000)]
MCJIT: Make sure to mask off non-type-field bits.
When comparing to the macho relocation type enum value, make sure we're only
comparing against the bits in the RelType that correspond.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163764
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Jim Grosbach [Thu, 13 Sep 2012 01:24:32 +0000 (01:24 +0000)]
MCJIT: Pass the i386 MachO relocation type properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163763
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Jakob Stoklund Olesen [Thu, 13 Sep 2012 00:25:00 +0000 (00:25 +0000)]
Don't fold indexed loads into TCRETURNmi64.
We don't have enough GR64_TC registers when calling a varargs function
with 6 arguments. Since %al holds the number of vector registers used,
only %r11 is available as a scratch register.
This means that addressing modes using both base and index registers
can't be folded into TCRETURNmi64.
<rdar://problem/
12282281>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163761
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Bill Wendling [Thu, 13 Sep 2012 00:09:55 +0000 (00:09 +0000)]
Introduce the __llvm_gcov_flush function.
This function writes out the current values of the counters and then resets
them. This can be used similarly to the __gcov_flush function to sync the
counters when need be. For instance, in a situation where the application
doesn't exit.
<rdar://problem/
12185886>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163757
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Eric Christopher [Wed, 12 Sep 2012 23:36:19 +0000 (23:36 +0000)]
Recommit, with fixes:
Add some support for dealing with an object pointer on arguments.
Part of rdar://
9797999
which now supports adding the object pointer attribute to the
subprogram as it should.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163754
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Akira Hatanaka [Wed, 12 Sep 2012 23:27:55 +0000 (23:27 +0000)]
Misc.
1. Remove RA from list of allocatable registers
2. Enable d,y,r constraint inline assembly instructions
Patch by Reed Kotler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163753
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Michael Liao [Wed, 12 Sep 2012 21:43:09 +0000 (21:43 +0000)]
Fix PR11985
- BlockAddress has no support of BA + offset form and there is no way to
propagate that offset into machine operand;
- Add BA + offset support and a new interface 'getTargetBlockAddress' to
simplify target block address forming;
- All targets are modified to use new interface and X86 backend is enhanced to
support BA + offset addressing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163743
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Dan Gohman [Wed, 12 Sep 2012 20:45:17 +0000 (20:45 +0000)]
Detect overflow in the path count computation. rdar://
12277446.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163739
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Owen Anderson [Wed, 12 Sep 2012 20:09:19 +0000 (20:09 +0000)]
Remove an overly-aggressive assertion. The code following this assertion already knows how to handle the case where DstRC was NULL, so it's not actually protecting us from anything, and this pattern can come up when using unknown_class operands in the SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163736
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Jakob Stoklund Olesen [Wed, 12 Sep 2012 20:04:17 +0000 (20:04 +0000)]
Delete dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163735
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Eric Christopher [Wed, 12 Sep 2012 18:42:31 +0000 (18:42 +0000)]
Revert "Add some support for dealing with an object pointer on arguments."
This should be done on the subprogram, not the variable itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163734
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Chad Rosier [Wed, 12 Sep 2012 18:24:26 +0000 (18:24 +0000)]
[ms-inline asm] Make the operand size directives case insensitive.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163729
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Jim Grosbach [Wed, 12 Sep 2012 17:40:25 +0000 (17:40 +0000)]
TableGen: Convert an assert() to a proper diagnostic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163726
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Manman Ren [Wed, 12 Sep 2012 17:04:11 +0000 (17:04 +0000)]
PGO: preserve branch-weight metadata when removing a case which jumps
to the default target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163724
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Dmitri Gribenko [Wed, 12 Sep 2012 16:59:47 +0000 (16:59 +0000)]
Fix a couple of Doxygen comment issues pointed out by -Wdocumentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163721
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Roman Divacky [Wed, 12 Sep 2012 15:29:32 +0000 (15:29 +0000)]
Enable exceptions handling on PPC64 now that cr misaligned spilling
was fixed in r163713.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163715
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Alexander Potapenko [Wed, 12 Sep 2012 15:01:33 +0000 (15:01 +0000)]
Suppress the warnings about unused parameters in changeColor()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163714
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Roman Divacky [Wed, 12 Sep 2012 14:47:47 +0000 (14:47 +0000)]
This patch corrects logic in PPCFrameLowering for save and restore of
nonvolatile condition register fields across calls under the SVR4 ABIs.
* With the 64-bit ABI, the save location is at a fixed offset of 8 from
the stack pointer. The frame pointer cannot be used to access this
portion of the stack frame since the distance from the frame pointer may
change with alloca calls.
* With the 32-bit ABI, the save location is just below the general
register save area, and is accessed via the frame pointer like the rest
of the save areas. This is an optional slot, so it must only be created
if any of CR2, CR3, and CR4 were modified.
* For both ABIs, save/restore logic is generated only if one of the
nonvolatile CR fields were modified.
I also took this opportunity to clean up an extra FIXME in
PPCFrameLowering.h. Save area offsets for 32-bit GPRs are meaningless
for the 64-bit ABI, so I removed them for correctness and efficiency.
Fixes PR13708 and partially also PR13623. It lets us enable exception handling
on PPC64.
Patch by William J. Schmidt!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163713
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Roman Divacky [Wed, 12 Sep 2012 14:36:02 +0000 (14:36 +0000)]
Add support for AMD Geode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163710
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Kristof Beyls [Wed, 12 Sep 2012 11:25:02 +0000 (11:25 +0000)]
Fix constant folding through bitcasts by no longer relying on undefined behaviour (converting NaN values between float and double).
SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget);
should not be used when Val is not a simple constant (as the comment in
SelectionDAG.h indicates). This patch avoids using this function
when folding an unknown constant through a bitcast, where it cannot be
guaranteed that Val will be a simple constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163703
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Nadav Rotem [Wed, 12 Sep 2012 11:06:26 +0000 (11:06 +0000)]
Add a flag to disable the code that looks for allocas which escaped the lifetime regions. This is useful for debugging. No testcase because without this check we fail on assertions when finding escaped allocas.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163702
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James Molloy [Wed, 12 Sep 2012 10:18:23 +0000 (10:18 +0000)]
Add a function computeRegisterLiveness() to MachineBasicBlock. This uses analyzePhysReg() from r163694 to heuristically try and determine the liveness state of a physical register upon arrival at a particular instruction in a block.
The search for liveness is clipped to a specific number of instructions around the target MachineInstr, in order to avoid degenerating into an O(N^2) algorithm. It tries to use various clues about how instructions around (both before and after) a given MachineInstr use that register, to determine its state at the MachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163695
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James Molloy [Wed, 12 Sep 2012 10:03:31 +0000 (10:03 +0000)]
Add an analyzePhysReg() function to MachineOperandIteratorBase that analyses an instruction's use of a physical register, analogous to analyzeVirtReg.
Rename RegInfo to VirtRegInfo so as not to be confused with the new PhysRegInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163694
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Duncan Sands [Wed, 12 Sep 2012 09:55:51 +0000 (09:55 +0000)]
When calling print directly on a global (eg from the debugger) it
was printing a newline that doesn't occur when printing other kinds
of LLVM values. Move the printing of that newline elsewhere, making
globals print the same as other values while leaving the output when
printing an entire module unchanged. Patch by Saša Tomić.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163693
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Nadav Rotem [Wed, 12 Sep 2012 07:58:35 +0000 (07:58 +0000)]
Enable stack-coloring, in hope that the recent fixes will enable correct dragonegg self-hosting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163687
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Lang Hames [Wed, 12 Sep 2012 06:56:16 +0000 (06:56 +0000)]
Make findLastUseBefore handle reg-unit liveness.
findLastUseBefore was previous considering virtreg liveness only, leading to
incorrect live intervals for reg units when instrs with physreg operands were
moved up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163685
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Craig Topper [Wed, 12 Sep 2012 06:20:41 +0000 (06:20 +0000)]
Indentation fixes. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163682
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Manman Ren [Wed, 12 Sep 2012 05:06:18 +0000 (05:06 +0000)]
Release build: guard dump functions with
"#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)"
No functional change. Update r163344.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163679
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Nadav Rotem [Wed, 12 Sep 2012 04:57:37 +0000 (04:57 +0000)]
Stack coloring: remove lifetime intervals which contain escaped allocas.
The input program may contain intructions which are not inside lifetime
markers. This can happen due to a bug in the compiler or due to a bug in
user code (for example, returning a reference to a local variable).
This commit adds checks that all of the instructions in the function and
invalidates lifetime ranges which do not contain all of the instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163678
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Eric Christopher [Wed, 12 Sep 2012 00:26:55 +0000 (00:26 +0000)]
Add some support for dealing with an object pointer on arguments.
Part of rdar://
9797999
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163667
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Owen Anderson [Tue, 11 Sep 2012 23:47:08 +0000 (23:47 +0000)]
Improve tblgen code cleanliness: create an unknown_class, from which the unknown def inherits. Make tblgen check for that class, rather than checking for the def itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163664
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Owen Anderson [Tue, 11 Sep 2012 23:32:17 +0000 (23:32 +0000)]
Compute a map from register names to registers, rather than scanning the list of registers every time we want to look up a register by name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163659
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Chad Rosier [Tue, 11 Sep 2012 23:20:20 +0000 (23:20 +0000)]
Add documentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163658
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Chad Rosier [Tue, 11 Sep 2012 23:03:44 +0000 (23:03 +0000)]
Add a few virtual functions to the abstract MCParsedAsmOperand class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163655
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Chad Rosier [Tue, 11 Sep 2012 23:02:35 +0000 (23:02 +0000)]
Rename the isMemory() function to isMem(). No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163654
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Manman Ren [Tue, 11 Sep 2012 22:23:19 +0000 (22:23 +0000)]
Release build: guard dump functions with
"#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)"
No functional change. Update r163339.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163653
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Chad Rosier [Tue, 11 Sep 2012 21:10:25 +0000 (21:10 +0000)]
StringSwitchify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163649
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Chad Rosier [Tue, 11 Sep 2012 20:57:04 +0000 (20:57 +0000)]
Simplify logic. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163648
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Chad Rosier [Tue, 11 Sep 2012 19:09:56 +0000 (19:09 +0000)]
[ms-inline asm] Split the parsing of IR asm strings into GCC and MS variants.
Add support in the EmitMSInlineAsmStr() function for handling integer consts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163645
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Manman Ren [Tue, 11 Sep 2012 17:43:35 +0000 (17:43 +0000)]
SimplifyCFG: preserve branch-weight metadata when creating a new switch from
a pair of switch/branch where both depend on the value of the same variable and
the default case of the first switch/branch goes to the second switch/branch.
Code clean up and fixed a few issues:
1> handling the case where some cases of the 2nd switch are invalidated
2> correctly calculate the weight for the 2nd switch when it is a conditional eq
Testing case is modified from Alastair's original patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163635
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Jakob Stoklund Olesen [Tue, 11 Sep 2012 16:34:08 +0000 (16:34 +0000)]
Add TRI::getSubRegIndexLaneMask().
Sub-register lane masks are bitmasks that can be used to determine if
two sub-registers of a virtual register will overlap. For example, ARM's
ssub0 and ssub1 sub-register indices don't overlap each other, but both
overlap dsub0 and qsub0.
The lane masks will be accurate on most targets, but on targets that use
sub-register indexes in an irregular way, the masks may conservatively
report that two sub-register indices overlap when the eventually
allocated physregs don't.
Irregular register banks also mean that the bits in a lane mask can't be
mapped onto register units, but the concept is similar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163630
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Jakob Stoklund Olesen [Tue, 11 Sep 2012 16:34:05 +0000 (16:34 +0000)]
Clean the sub-reg index composition maps at emission.
Preserve the Composites map in the CodeGenSubRegIndex class so it can be
used to determine which sub-register indices can actually be composed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163629
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Jakob Stoklund Olesen [Tue, 11 Sep 2012 16:34:02 +0000 (16:34 +0000)]
Add MCRI::getNumSubRegIndices() and start checking SubRegIndex ranges.
Apparently, NumSubRegIndices was completely unused before. Adjust it by
one to include the null subreg index, just like getNumRegs() includes
the null register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163628
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Chad Rosier [Tue, 11 Sep 2012 16:33:10 +0000 (16:33 +0000)]
Formatting. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163627
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Nadav Rotem [Tue, 11 Sep 2012 15:40:27 +0000 (15:40 +0000)]
Dragonegg selfhost exposed additional cases where alloca usage moved outside of lifetime markers. Disabling the pass for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163623
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Nadav Rotem [Tue, 11 Sep 2012 13:48:35 +0000 (13:48 +0000)]
Enable stack coloring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163617
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Nadav Rotem [Tue, 11 Sep 2012 12:34:27 +0000 (12:34 +0000)]
Stack Coloring: Dont crash on dbg values which use stack frames.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163616
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Evgeniy Stepanov [Tue, 11 Sep 2012 11:54:27 +0000 (11:54 +0000)]
CMake toolchain file for Android NDK.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163612
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Duncan Sands [Tue, 11 Sep 2012 07:50:40 +0000 (07:50 +0000)]
Add IRC handle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163601
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Craig Topper [Tue, 11 Sep 2012 06:15:32 +0000 (06:15 +0000)]
Make a bunch of lowering helper functions static instead of member functions. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163596
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Craig Topper [Tue, 11 Sep 2012 04:19:21 +0000 (04:19 +0000)]
Change unsigned to a uint16_t in static disassembler tables to reduce the table size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163594
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NAKAMURA Takumi [Tue, 11 Sep 2012 02:55:37 +0000 (02:55 +0000)]
llvm/lib/Transforms/Utils/CMakeLists.txt: Update.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163593
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Alex Rosenberg [Tue, 11 Sep 2012 02:46:18 +0000 (02:46 +0000)]
Add a pass that renames everything with metasyntatic names. This works well after using bugpoint to reduce the confusion presented by the original names, which no longer mean what they used to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163592
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Craig Topper [Tue, 11 Sep 2012 01:45:21 +0000 (01:45 +0000)]
Teach DAG combiner to constant fold FABS of a BUILD_VECTOR of ConstantFPs. Factor similar code out of FNEG DAG combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163587
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Chandler Carruth [Tue, 11 Sep 2012 01:17:24 +0000 (01:17 +0000)]
Add support for finding cacheflush on OpenBSD/mips64 platforms.
Patch by Brad Smith!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163584
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