Allow the second opcode info table to be 8, 16, or 32-bits as needed to represent...
authorCraig Topper <craig.topper@gmail.com>
Fri, 14 Sep 2012 08:33:11 +0000 (08:33 +0000)
committerCraig Topper <craig.topper@gmail.com>
Fri, 14 Sep 2012 08:33:11 +0000 (08:33 +0000)
commitf4d78241ea180b039596ce3d453ab2cc5ed35fc6
treed22b520426ae1dbc60659b87e60ca85109092562
parent4e5babe4f3aa5aaabf8ee91b10f64c9e35f2505c
Allow the second opcode info table to be 8, 16, or 32-bits as needed to represent additional fragments. This recovers some space on ATT X86 syntax and PowerPC which only need 40-bits instead of 48-bits. This also increases ARM to 64-bits to fully encode all of its operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163880 91177308-0d34-0410-b5e6-96231b3b80d8
utils/TableGen/AsmWriterEmitter.cpp