oota-llvm.git
9 years agoindvars cruft: don't replace phi nodes for no reason.
Andrew Trick [Mon, 18 May 2015 16:49:34 +0000 (16:49 +0000)]
indvars cruft: don't replace phi nodes for no reason.

Don't replace a phi with an identical phi. This was done long ago to
"preserve" IVUsers analysis. The code has already called
SE->forgetValue(PN) so I see no purpose in creating a new value for
the phi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237587 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSimplifyIV comments and dead argument cleanup.
Andrew Trick [Mon, 18 May 2015 16:49:31 +0000 (16:49 +0000)]
SimplifyIV comments and dead argument cleanup.

Remove crufty comments. IVUsers hasn't been used here for a long time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237586 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSparc: support the "set" synthetic instruction.
James Y Knight [Mon, 18 May 2015 16:43:33 +0000 (16:43 +0000)]
Sparc: support the "set" synthetic instruction.

This pseudo-instruction expands into 'sethi' and 'or' instructions,
or, just one of them, if the other isn't necessary for a given value.

Differential Revision: http://reviews.llvm.org/D9089

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237585 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoPreserve the order of READ_REGISTER and WRITE_REGISTER
Hal Finkel [Mon, 18 May 2015 16:42:10 +0000 (16:42 +0000)]
Preserve the order of READ_REGISTER and WRITE_REGISTER

At the present time, we don't have a way to represent general dependency
relationships, so everything is represented using memory dependency. In order
to preserve the data dependency of a READ_REGISTER on WRITE_REGISTER, we need
to model WRITE_REGISTER as writing (which we had been doing) and model
READ_REGISTER as reading (which we had not been doing). Fix this, and also the
way that the chain operands were generated at the SDAG level.

Patch by Nicholas Paul Johnson, thanks! Test case by me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237584 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert r237579, as it broke windows buildbots
Oliver Stannard [Mon, 18 May 2015 16:39:16 +0000 (16:39 +0000)]
Revert r237579, as it broke windows buildbots

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237583 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSparc: Support PSR, TBR, WIM read/write instructions.
James Y Knight [Mon, 18 May 2015 16:38:47 +0000 (16:38 +0000)]
Sparc: Support PSR, TBR, WIM read/write instructions.

Differential Revision: http://reviews.llvm.org/D8971

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237582 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoSparc: Add the "alternate address space" load/store instructions.
James Y Knight [Mon, 18 May 2015 16:35:04 +0000 (16:35 +0000)]
Sparc: Add the "alternate address space" load/store instructions.

- Adds support for the asm syntax, which has an immediate integer
  "ASI" (address space identifier) appearing after an address, before
  a comma.

- Adds the various-width load, store, and swap in alternate address
  space instructions. (ldsba, ldsha, lduba, lduha, lda, stba, stha,
  sta, swapa)

This does not attempt to hook these instructions up to pointer address
spaces in LLVM, although that would probably be a reasonable thing to
do in the future.

Differential Revision: http://reviews.llvm.org/D8904

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237581 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd support for the Sparc implementation-defined "ASR" registers.
James Y Knight [Mon, 18 May 2015 16:29:48 +0000 (16:29 +0000)]
Add support for the Sparc implementation-defined "ASR" registers.

(Note that register "Y" is essentially just ASR0).

Also added some test cases for divide and multiply, which had none before.

Differential Revision: http://reviews.llvm.org/D8670

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237580 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[LLVM - ARM/AArch64] Add ACLE special register intrinsics
Oliver Stannard [Mon, 18 May 2015 16:23:33 +0000 (16:23 +0000)]
[LLVM - ARM/AArch64] Add ACLE special register intrinsics

This patch implements LLVM support for the ACLE special register intrinsics in
section 10.1, __arm_{w,r}sr{,p,64}.

This patch is intended to lower the read/write_register instrinsics, used to
implement the special register intrinsics in the clang patch for special
register intrinsics (see http://reviews.llvm.org/D9697), to ARM specific
instructions MRC,MCR,MSR etc. to allow reading an writing of coprocessor
registers in AArch32 and AArch64. This is done by inspecting the register
string passed to the intrinsic and then lowering to the appropriate
instruction.

Patch by Luke Cheeseman.

Differential Revision: http://reviews.llvm.org/D9699

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237579 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[DAGCombine] Be more pedantic about use iteration in CombineToPreIndexedLoadStore
Hal Finkel [Mon, 18 May 2015 15:46:02 +0000 (15:46 +0000)]
[DAGCombine] Be more pedantic about use iteration in CombineToPreIndexedLoadStore

In CombineToPreIndexedLoadStore, when the offset is a constant, we have code
that looks for other uses of the pointer which are constant offset computations
so that they can be rewritten in terms of the updated pointer so that we don't
need to keep a copy of the base pointer to compute these constant offsets.

Unfortunately, when it iterated over the uses, it did so by SDNodes, and so we
could confuse ourselves if the base pointer was produced by a node that had
multiple results (because we would not immediately exclude uses of the other
node results). This was reported as PR22755. Unfortunately, we don't have a
test case (and I've also been unable to produce one thus far), but at least the
mistake is clear. The right way to fix this problem is to make use of the information
contained in the use iterators to filter out any uses of other results of the
node producing the base pointer.

This should be mostly NFC, but should also fix PR22755 (for which,
unfortunately, we have no in-tree test case).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237576 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[LoopAccesses] If shouldRetryWithRuntimeCheck, reset InterestingDependences
Adam Nemet [Mon, 18 May 2015 15:37:03 +0000 (15:37 +0000)]
[LoopAccesses] If shouldRetryWithRuntimeCheck, reset InterestingDependences

When dependence analysis encounters a non-constant distance between
memory accesses it aborts the analysis and falls back to run-time checks
only.  In this case we weren't resetting the array of dependences.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237574 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[LoopAccesses] Rearrange printed lines in -analyze
Adam Nemet [Mon, 18 May 2015 15:36:57 +0000 (15:36 +0000)]
[LoopAccesses] Rearrange printed lines in -analyze

"Store to invariant address..." is moved as the last line.  This is not
the prime result of the analysis.  Plus it simplifies some of the tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237573 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[LoopAccesses] Debug improvement
Adam Nemet [Mon, 18 May 2015 15:36:52 +0000 (15:36 +0000)]
[LoopAccesses] Debug improvement

Report pointers with unknown bounds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237572 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips][microMIPSr6] Implement ALIGN and AUI instructions
Jozef Kolek [Mon, 18 May 2015 11:44:30 +0000 (11:44 +0000)]
[mips][microMIPSr6] Implement ALIGN and AUI instructions

This patch implements ALIGN and AUI instructions using mapping.

Differential Revision: http://reviews.llvm.org/D8782

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237563 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAVX-512: Added intrinsics for ADDSS/D, MULSS/D, SUBSS/D, DIVSS/D
Elena Demikhovsky [Mon, 18 May 2015 07:24:19 +0000 (07:24 +0000)]
AVX-512: Added intrinsics for ADDSS/D, MULSS/D, SUBSS/D, DIVSS/D
instructions. These intrinsics are comming with rounding mode.
Added intrinsics for MAXSS/D, MINSS/D - with and without  sae.

By Asaf Badouh (asaf.badouh@intel.com)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237560 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agofixed compilation warning/error
Elena Demikhovsky [Mon, 18 May 2015 07:10:25 +0000 (07:10 +0000)]
fixed compilation warning/error

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237559 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAVX-512: Added patterns for scalar-to-vector broadcast
Elena Demikhovsky [Mon, 18 May 2015 07:06:23 +0000 (07:06 +0000)]
AVX-512: Added patterns for scalar-to-vector broadcast

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237558 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAVX-512: Added VBROADCASTF64X4, VBROADCASTF64X2, VBROADCASTI32X8, and other instructi...
Elena Demikhovsky [Mon, 18 May 2015 06:42:57 +0000 (06:42 +0000)]
AVX-512: Added VBROADCASTF64X4, VBROADCASTF64X2, VBROADCASTI32X8, and other instructions from this set
Added encoding tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237557 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[PowerPC] Add extra r2 read deps on @toc@l relocations
Hal Finkel [Mon, 18 May 2015 06:25:59 +0000 (06:25 +0000)]
[PowerPC] Add extra r2 read deps on @toc@l relocations

If some commits are happy, and some commits are sad, this is a sad commit. It
is sad because it restricts instruction scheduling to work around a binutils
linker bug, and moreover, one that may never be fixed. On 2012-05-21, GCC was
updated not to produce code triggering this bug, and now we'll do the same...

When resolving an address using the ELF ABI TOC pointer, two relocations are
generally required: one for the high part and one for the low part. Only
the high part generally explicitly depends on r2 (the TOC pointer). And, so,
we might produce code like this:

.Ltmp526:
        addis 3, 2, .LC12@toc@ha
.Ltmp1628:
        std 2, 40(1)
        ld 5, 0(27)
        ld 2, 8(27)
        ld 11, 16(27)
        ld 3, .LC12@toc@l(3)
        rldicl 4, 4, 0, 32
        mtctr 5
        bctrl
        ld 2, 40(1)

And there is nothing wrong with this code, as such, but there is a linker bug
in binutils (https://sourceware.org/bugzilla/show_bug.cgi?id=18414) that will
misoptimize this code sequence to this:
        nop
        std     r2,40(r1)
        ld      r5,0(r27)
        ld      r2,8(r27)
        ld      r11,16(r27)
        ld      r3,-32472(r2)
        clrldi  r4,r4,32
        mtctr   r5
        bctrl
        ld      r2,40(r1)
because the linker does not know (and does not check) that the value in r2
changed in between the instruction using the .LC12@toc@ha (TOC-relative)
relocation and the instruction using the .LC12@toc@l(3) relocation.
Because it finds these instructions using the relocations (and not by
scanning the instructions), it has been asserted that there is no good way
to detect the change of r2 in between. As a result, this bug may never be
fixed (i.e. it may become part of the definition of the ABI). GCC was
updated to add extra dependencies on r2 to instructions using the @toc@l
relocations to avoid this problem, and we'll do the same here.

This is done as a separate pass because:
 1. These extra r2 dependencies are not really properties of the
    instructions, but rather due to a linker bug, and maybe one day we'll be
    able to get rid of them when targeting linkers without this bug (and,
    thus, keeping the logic centralized here will make that
    straightforward).
 2. There are ISel-level peephole optimizations that propagate the @toc@l
    relocations to some user instructions, and so the exta dependencies do
    not apply only to a fixed set of instructions (without undesirable
    definition replication).

The test case was reduced with the help of bugpoint, with minimal cleaning. I'm
looking forward to our upcoming MI serialization support, and with that, much
better tests can be created.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237556 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMachineScheduler debug output clarity.
Andrew Trick [Sun, 17 May 2015 23:40:31 +0000 (23:40 +0000)]
MachineScheduler debug output clarity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237545 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRegisterPressureTracker: reword stale comments.
Andrew Trick [Sun, 17 May 2015 23:40:27 +0000 (23:40 +0000)]
RegisterPressureTracker: reword stale comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237544 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReapply r237520 with another fix for infinite looping
James Molloy [Sun, 17 May 2015 08:27:27 +0000 (08:27 +0000)]
Reapply r237520 with another fix for infinite looping

SimplifyDemandedBits was "simplifying" a constant by removing just sign bits.
This caused a canonicalization race between different parts of instcombine.

Fix and regression test added - third time lucky?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237539 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAVX-512: fixed extended load to 512-bit register
Elena Demikhovsky [Sun, 17 May 2015 08:08:06 +0000 (08:08 +0000)]
AVX-512: fixed extended load to 512-bit register

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237537 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAVX-512: fixed a bug in mask operations - (i1 1) pattern
Elena Demikhovsky [Sun, 17 May 2015 07:28:51 +0000 (07:28 +0000)]
AVX-512: fixed a bug in mask operations - (i1 1) pattern
Filling k-reg with all-ones value was wrong,
(i1 1) should switch on only one bit in mask register

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237536 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoCode cleanup: Reindent Fuzzer::MutateAndTestOne.
Logan Chien [Sun, 17 May 2015 02:44:31 +0000 (02:44 +0000)]
Code cleanup: Reindent Fuzzer::MutateAndTestOne.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237533 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert commits r237521 and r237520.
James Molloy [Sat, 16 May 2015 21:27:14 +0000 (21:27 +0000)]
Revert commits r237521 and r237520.

The AArch64 LNT bot is unhappy - I've found that the problem is in
SimpliftDemandedBits, but that's going to require another code review
so reverting in the meantime.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237528 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMove Pass into anonymous namespace. NFC.
Benjamin Kramer [Sat, 16 May 2015 16:16:35 +0000 (16:16 +0000)]
Move Pass into anonymous namespace. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237526 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[WinEH] Push unique_ptr through the Action interface.
Benjamin Kramer [Sat, 16 May 2015 15:40:03 +0000 (15:40 +0000)]
[WinEH] Push unique_ptr through the Action interface.

This was the source of many leaks in the past, this should fix them once and
for all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237524 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDenseMap: Remove poisoning of unused memory.
Benjamin Kramer [Sat, 16 May 2015 14:19:54 +0000 (14:19 +0000)]
DenseMap: Remove poisoning of unused memory.

DenseMap has great support for catching invalidated iterators now so we can get
rid of this crude hack. Use after frees are covered by asan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237523 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: Lower the default alignment of MCContext's operator new to 8
Benjamin Kramer [Sat, 16 May 2015 13:54:08 +0000 (13:54 +0000)]
MC: Lower the default alignment of MCContext's operator new to 8

This is more than sufficient for all MC types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237522 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUpdate to r237520 - swap order of CHECK-NEXT lines.
James Molloy [Sat, 16 May 2015 13:26:25 +0000 (13:26 +0000)]
Update to r237520 - swap order of CHECK-NEXT lines.

... I'd copied the check-next lines from a previous test so they were
slightly wrong, and had managed to test the wrong source tree. D'oh!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237521 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReapply r237453 with a fix for the test timeouts.
James Molloy [Sat, 16 May 2015 13:10:45 +0000 (13:10 +0000)]
Reapply r237453 with a fix for the test timeouts.

The test timeouts were due to instcombine fighting itself. Regression test added.
Original log message:

Canonicalize min/max expressions correctly.

This patch introduces a canonical form for min/max idioms where one operand
is extended or truncated. This often happens when the other operand is a
constant. For example:

  %1 = icmp slt i32 %a, i32 0
    %2 = sext i32 %a to i64
      %3 = select i1 %1, i64 %2, i64 0

Would now be canonicalized into:

  %1 = icmp slt i32 %a, i32 0
    %2 = select i1 %1, i32 %a, i32 0
      %3 = sext i32 %2 to i64

This builds upon a patch posted by David Majenemer
(https://www.marc.info/?l=llvm-commits&m=143008038714141&w=2). That pass
passively stopped instcombine from ruining canonical patterns. This
patch additionally actively makes instcombine canonicalize too.

Canonicalization of expressions involving a change in type from int->fp
or fp->int are not yet implemented.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237520 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[x86] Distinguish the 'o', 'v', 'X', and 'i' inline assembly memory constraints.
Daniel Sanders [Sat, 16 May 2015 12:09:54 +0000 (12:09 +0000)]
[x86] Distinguish the 'o', 'v', 'X', and 'i' inline assembly memory constraints.

Summary:
But still handle them the same way since I don't know how they differ on
this target.

Of these, 'o' and 'v' are not tested but were already implemented.

I'm not sure why 'i' is required for X86 since it's supposed to be an
immediate constraint rather than a memory constraint. A test asserts
without it so I've included it for now.

No functional change intended.

Reviewers: nadav

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8254

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237517 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoImprove check on git-svnrevert, better error message
Renato Golin [Sat, 16 May 2015 10:23:48 +0000 (10:23 +0000)]
Improve check on git-svnrevert, better error message

When the commit is not in the tree at all, find-rev returns 0
and prints an empty string. We need to catch that problem too,
when trying to revert.

Adding a list of possible problems, so that you can easily and
quickly correct without having to edit the script again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237516 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[TableGen] Change 'car' to 'head' and 'cdr' to 'tail' in assert comments. These were...
Craig Topper [Sat, 16 May 2015 05:42:13 +0000 (05:42 +0000)]
[TableGen] Change 'car' to 'head' and 'cdr' to 'tail' in assert comments. These were the old names for these operations long ago. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237514 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[TableGen] Remove !! that I can't really explain why I wrote. Also remove some unnece...
Craig Topper [Sat, 16 May 2015 05:42:11 +0000 (05:42 +0000)]
[TableGen] Remove !! that I can't really explain why I wrote. Also remove some unnecessary curly braces from the same area.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237513 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoCorrect indentation. NFC
Craig Topper [Sat, 16 May 2015 05:42:08 +0000 (05:42 +0000)]
Correct indentation. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237512 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[TableGen] Restructure a loop to make it exit early instead of skipping a portion...
Craig Topper [Sat, 16 May 2015 05:42:03 +0000 (05:42 +0000)]
[TableGen] Restructure a loop to make it exit early instead of skipping a portion of the body based on what will also be the terminating condition. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237511 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMachineSink: Collect registers before clearing their killflags.
Matthias Braun [Sat, 16 May 2015 03:11:07 +0000 (03:11 +0000)]
MachineSink: Collect registers before clearing their killflags.

Currently whenever we sink any instruction, we do clearKillFlags for
every use of every use operand for that instruction, apparently there
are a lot of duplication, therefore compile time penalties.

This patch collect all the interested registers first, do clearKillFlags
for it all together at once at the end, so we only need to do
clearKillFlags once for one register, duplication is avoided.

Patch by Lawrence Hu!

Differential Revision: http://reviews.llvm.org/D9719

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237510 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[MemCpyOpt] Turn memcpy from just-memset'd source into memset.
Ahmed Bougacha [Sat, 16 May 2015 01:32:26 +0000 (01:32 +0000)]
[MemCpyOpt] Turn memcpy from just-memset'd source into memset.

There's no point in copying around constants, so, when all else fails,
we can still transform memcpy of memset into two independent memsets.

To quote the example, we can turn:
  memset(dst1, c, dst1_size);
  memcpy(dst2, dst1, dst2_size);
into:
  memset(dst1, c, dst1_size);
  memset(dst2, c, dst2_size);
When dst2_size <= dst1_size.

Like r235232 for copy constructors, this can occur in move constructors.

Differential Revision: http://reviews.llvm.org/D9682

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237506 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[MemCpyOpt] Remove dead argument. NFC.
Ahmed Bougacha [Sat, 16 May 2015 01:23:47 +0000 (01:23 +0000)]
[MemCpyOpt] Remove dead argument. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237503 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: Use MCSymbol in RelAndSymbol, NFC
Duncan P. N. Exon Smith [Sat, 16 May 2015 01:14:19 +0000 (01:14 +0000)]
MC: Use MCSymbol in RelAndSymbol, NFC

Switch from `MCSymbolData` to `MCSymbol`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237502 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove dead code in testcase. NFC.
Ahmed Bougacha [Sat, 16 May 2015 01:10:40 +0000 (01:10 +0000)]
Remove dead code in testcase. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237501 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[PPC64] Add vector pack/unpack support from ISA 2.07
Bill Schmidt [Sat, 16 May 2015 01:02:12 +0000 (01:02 +0000)]
[PPC64] Add vector pack/unpack support from ISA 2.07

This patch adds support for the following new instructions in the
Power ISA 2.07:

  vpksdss
  vpksdus
  vpkudus
  vpkudum
  vupkhsw
  vupklsw

These instructions are available through the vec_packs, vec_packsu,
vec_unpackh, and vec_unpackl built-in interfaces.  These are
lane-sensitive instructions, so the built-ins have different
implementations for big- and little-endian, and the instructions must
be marked as killing the vector swap optimization for now.

The first three instructions perform saturating pack operations.  The
fourth performs a modulo pack operation, which means it can be
represented with a vector shuffle, and conversely the appropriate
vector shuffles may cause this instruction to be generated.  The other
instructions are only generated via built-in support for now.

Appropriate tests have been added.

There is a companion patch to clang for the rest of this support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237499 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: Use MCSymbol in MCObject::IsSymbolRefDifferenceFullyResolvedImpl()
Duncan P. N. Exon Smith [Sat, 16 May 2015 01:01:55 +0000 (01:01 +0000)]
MC: Use MCSymbol in MCObject::IsSymbolRefDifferenceFullyResolvedImpl()

Transition one API from `MCSymbolData` to `MCSymbol`.  The function
needs both, and the backpointer from `MCSymbolData` to `MCSymbol` is
going away.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237498 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: Change MCFragment::Atom to an MCSymbol, NFC
Duncan P. N. Exon Smith [Sat, 16 May 2015 00:48:58 +0000 (00:48 +0000)]
MC: Change MCFragment::Atom to an MCSymbol, NFC

Change `MCFragment::Atom` from an `MCSymbolData` to an `MCSymbol`,
moving in the direction of removing the back-pointer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237497 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: Change MCAssembler::Symbols to store MCSymbol, NFC
Duncan P. N. Exon Smith [Sat, 16 May 2015 00:35:24 +0000 (00:35 +0000)]
MC: Change MCAssembler::Symbols to store MCSymbol, NFC

Instead of storing a list of the `MCSymbolData` in use, store the
`MCSymbol`s.  Churning in the direction of removing the back pointer
from `MCSymbolData`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237496 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[BitcodeReader] Don't allow INSERTVAL/EXTRACTVAL with 0 indices
Filipe Cabecinhas [Sat, 16 May 2015 00:33:12 +0000 (00:33 +0000)]
[BitcodeReader] Don't allow INSERTVAL/EXTRACTVAL with 0 indices

This would trigger an assertion later.

Bug found with AFL fuzz.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237494 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: Merge MCSymbol and MCSymbolData
Duncan P. N. Exon Smith [Sat, 16 May 2015 00:03:06 +0000 (00:03 +0000)]
MC: Merge MCSymbol and MCSymbolData

Turn `MCSymbolData` into a field inside of `MCSymbol`.  Keep all the old
API alive for now, so that consumers can be updated in a later commit.
This means we still temporarily need the back pointer from
`MCSymbolData` to `MCSymbol`, but I'll remove it in a follow-up.

This optimizes for object emission over assembly emission.  By removing
the `DenseMap` in `MCAssembler`, llc memory usage drops from around 1040
MB to 1001 MB (3.8%).

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237490 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: Move MCSymbolData to MCSymbol.h, NFC
Duncan P. N. Exon Smith [Sat, 16 May 2015 00:03:00 +0000 (00:03 +0000)]
MC: Move MCSymbolData to MCSymbol.h, NFC

Prepare for always including symbol data in MCSymbol.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237489 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove redundant checks. NFC
Filipe Cabecinhas [Fri, 15 May 2015 23:57:13 +0000 (23:57 +0000)]
Remove redundant checks. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237488 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: Change MCAssembler::Symbols to a vector
Duncan P. N. Exon Smith [Fri, 15 May 2015 22:56:01 +0000 (22:56 +0000)]
MC: Change MCAssembler::Symbols to a vector

Instead of an intrusive double-linked linked list, use a
`std::vector<>`.  This saves a pointer per symbol and simplifies
`MCSymbolData`.  Otherwise, no functionality change here.

While I measured a memory drop from around 1047MB to 1040MB (0.6%) --
and this is a decent cleanup in its own right -- it's primarily a
preparation patch for merging `MCSymbol` and `MCSymbolData`.  I'll post
an updated patch for that to the list in a moment.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237487 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: Reduce MCAssembler::Symbols API exposure, NFC
Duncan P. N. Exon Smith [Fri, 15 May 2015 22:33:34 +0000 (22:33 +0000)]
MC: Reduce MCAssembler::Symbols API exposure, NFC

Stop exposing the storage for `MCAssembler::Symbols`, and have
`MCAssembler` add symbols directly to its list instead of using a hook
in `MCSymbolData`.  This opens up room for a follow-up commit to switch
from a linked list to a vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237486 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove MCAssembler.h include from MCStreamer.h and fix users of MCStreamer.h
Pete Cooper [Fri, 15 May 2015 22:19:42 +0000 (22:19 +0000)]
Remove MCAssembler.h include from MCStreamer.h and fix users of MCStreamer.h

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237483 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove 3 includes from MCInstrDesc.h and explicitly include them where needed
Pete Cooper [Fri, 15 May 2015 21:58:42 +0000 (21:58 +0000)]
Remove 3 includes from MCInstrDesc.h and explicitly include them where needed

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237481 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMove some methods to a new MCInstrDesc.cpp file to allow includes to be trimmed....
Pete Cooper [Fri, 15 May 2015 21:29:43 +0000 (21:29 +0000)]
Move some methods to a new MCInstrDesc.cpp file to allow includes to be trimmed.  NFC.

MCInstrDesc.h includes things like MCInst.h which i can now remove after this.  That will be a future commit.

Reviewed by Jim Grosbach.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237478 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[RuntimeDyld] Use isInt to assert that a relocation didn't overflow
David Majnemer [Fri, 15 May 2015 20:32:25 +0000 (20:32 +0000)]
[RuntimeDyld] Use isInt to assert that a relocation didn't overflow

isInt is a little easier to read, let's use that more consistently.
Incidentally, this also silences a warning for shifting a negative
number.

This fixes PR23532.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237476 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86] Use a better sentinel offset for the FrameAddr index
David Majnemer [Fri, 15 May 2015 20:08:27 +0000 (20:08 +0000)]
[X86] Use a better sentinel offset for the FrameAddr index

Other pieces of CodeGen want to negate frame object offsets to account
for architectures where the stack grows down.  Our object is a pseudo
object so it's offset doesn't matter.  However, we shouldn't choose an
offset which results in undefined behavior if you negate it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237474 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: MCCodeGenInfo naming update. NFC.
Jim Grosbach [Fri, 15 May 2015 19:13:31 +0000 (19:13 +0000)]
MC: MCCodeGenInfo naming update. NFC.

s/InitMCCodeGenInfo/initMCCodeGenInfo/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237471 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: clang-format. NFC.
Jim Grosbach [Fri, 15 May 2015 19:13:20 +0000 (19:13 +0000)]
MC: clang-format. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237470 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: Update MCCodeEmitter naming. NFC.
Jim Grosbach [Fri, 15 May 2015 19:13:16 +0000 (19:13 +0000)]
MC: Update MCCodeEmitter naming. NFC.

s/EncodeInstruction/encodeInstruction/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237469 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: Update MCFixup naming. NFC.
Jim Grosbach [Fri, 15 May 2015 19:13:05 +0000 (19:13 +0000)]
MC: Update MCFixup naming. NFC.

s/MCFixup::Create/MCFixup::create/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237468 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[NFC] remove an extra new line
Jingyue Wu [Fri, 15 May 2015 18:32:21 +0000 (18:32 +0000)]
[NFC] remove an extra new line

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237462 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoWhile in GlobalValue fix the function(s) that don't follow the
Eric Christopher [Fri, 15 May 2015 18:20:14 +0000 (18:20 +0000)]
While in GlobalValue fix the function(s) that don't follow the
naming convention and update users.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237461 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd a speculative execution pass
Jingyue Wu [Fri, 15 May 2015 17:54:48 +0000 (17:54 +0000)]
Add a speculative execution pass

Summary:
This is a pass for speculative execution of instructions for simple if-then (triangle) control flow. It's aimed at GPUs, but could perhaps be used in other contexts. Enabling this pass gives us a 1.0% geomean improvement on Google benchmark suites, with one benchmark improving 33%.

Credit goes to Jingyue Wu for writing an earlier version of this pass.

Patched by Bjarke Roune.

Test Plan:
This patch adds a set of tests in test/Transforms/SpeculativeExecution/spec.ll
The pass is controlled by a flag which defaults to having the pass not run.

Reviewers: eliben, dberlin, meheff, jingyue, hfinkel

Reviewed By: jingyue, hfinkel

Subscribers: majnemer, jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D9360

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237459 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "Canonicalize min/max expressions correctly."
James Molloy [Fri, 15 May 2015 17:45:09 +0000 (17:45 +0000)]
Revert "Canonicalize min/max expressions correctly."

This reverts r237453 - it was causing timeouts on some bots. Reverting
while I investigate (it's probably InstCombine fighting itself...)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237458 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SDAGBuilder] Make the AArch64 builder happier.
James Molloy [Fri, 15 May 2015 17:41:29 +0000 (17:41 +0000)]
[SDAGBuilder] Make the AArch64 builder happier.

I intended this loop to only unwrap SplitVector actions, but it
was more broad than that, such as unwrapping WidenVector actions,
which makes operations seem legal when they're not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237457 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SLSR] handle (B | i) * S
Jingyue Wu [Fri, 15 May 2015 17:07:48 +0000 (17:07 +0000)]
[SLSR] handle (B | i) * S

Summary:
Consider (B | i) * S as (B + i) * S if B and i have no bits set in
common.

Test Plan: @or in slsr-mul.ll

Reviewers: broune, meheff

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9788

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237456 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMark SMIN/SMAX/UMIN/UMAX nodes as legal and add patterns for them.
James Molloy [Fri, 15 May 2015 16:15:57 +0000 (16:15 +0000)]
Mark SMIN/SMAX/UMIN/UMAX nodes as legal and add patterns for them.

The new [SU]{MIN,MAX} SDNodes can be lowered directly to instructions for
most NEON datatypes - the big exclusion being v2i64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237455 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoCanonicalize min/max expressions correctly.
James Molloy [Fri, 15 May 2015 16:10:59 +0000 (16:10 +0000)]
Canonicalize min/max expressions correctly.

This patch introduces a canonical form for min/max idioms where one operand
is extended or truncated. This often happens when the other operand is a
constant. For example:

  %1 = icmp slt i32 %a, i32 0
  %2 = sext i32 %a to i64
  %3 = select i1 %1, i64 %2, i64 0

Would now be canonicalized into:

  %1 = icmp slt i32 %a, i32 0
  %2 = select i1 %1, i32 %a, i32 0
  %3 = sext i32 %2 to i64

This builds upon a patch posted by David Majenemer
(https://www.marc.info/?l=llvm-commits&m=143008038714141&w=2). That pass
passively stopped instcombine from ruining canonical patterns. This
patch additionally actively makes instcombine canonicalize too.

Canonicalization of expressions involving a change in type from int->fp
or fp->int are not yet implemented.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237453 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAllow min/max detection to see through casts.
James Molloy [Fri, 15 May 2015 16:04:50 +0000 (16:04 +0000)]
Allow min/max detection to see through casts.

This teaches the min/max idiom detector in ValueTracking to see through
casts such as SExt/ZExt/Trunc. SCEV can already do this, so we're bringing
non-SCEV analyses up to the same level.

The returned LHS/RHS will not match the type of the original SelectInst
any more, so a CastOp is returned too to inform the caller how to
convert to the SelectInst's type.

No in-tree users yet; this will be used by InstCombine in a followup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237452 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[llvm-readobj] Teach llvm-readobj to print PT_MIPS_ABIFLAGS program header
Simon Atanasyan [Fri, 15 May 2015 15:59:22 +0000 (15:59 +0000)]
[llvm-readobj] Teach llvm-readobj to print PT_MIPS_ABIFLAGS program header

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237451 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoNFC - Test case invokes llc on a file rather than redirected from a file.
Nemanja Ivanovic [Fri, 15 May 2015 15:29:53 +0000 (15:29 +0000)]
NFC - Test case invokes llc on a file rather than redirected from a file.

This has caused some local failures. Updating the test case to be more
like the majority of the similar test cases.
Committing on behalf of Hubert Tong (hstong@ca.ibm.com).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237449 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[xcore] Only support the 'm' inline assembly memory constraint. NFC.
Daniel Sanders [Fri, 15 May 2015 12:32:16 +0000 (12:32 +0000)]
[xcore] Only support the 'm' inline assembly memory constraint. NFC.

Summary:
XCore doesn't seem to have any additional constraints. Therefore remove
the target hook.

No functional change intended.

Reviewers: friedgold

Reviewed By: friedgold

Subscribers: friedgold, llvm-commits

Differential Revision: http://reviews.llvm.org/D8921

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237442 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[DependenceAnalysis] Fix for PR21585: collectUpperBound triggers asserts
James Molloy [Fri, 15 May 2015 12:17:22 +0000 (12:17 +0000)]
[DependenceAnalysis] Fix for PR21585: collectUpperBound triggers asserts

collectUpperBound hits an assertion when the back edge count is wider then the desired type.

If that happens, truncate the backedge count.

Patch by Philip Pfaffe!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237439 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] [IAS] Fix expansion of negative 32-bit immediates for LI/DLI.
Toma Tabacu [Fri, 15 May 2015 09:42:11 +0000 (09:42 +0000)]
[mips] [IAS] Fix expansion of negative 32-bit immediates for LI/DLI.

Summary:
To maintain compatibility with GAS, we need to stop treating negative 32-bit immediates as 64-bit values when expanding LI/DLI.
This currently happens because of sign extension.

To do this we need to choose the 32-bit value expansion for values which use their upper 33 bits only for sign extension (i.e. no 0's, only 1's).

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8662

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237428 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd SDNodes for umin, umax, smin and smax.
James Molloy [Fri, 15 May 2015 09:03:15 +0000 (09:03 +0000)]
Add SDNodes for umin, umax, smin and smax.

This adds new SDNodes for signed/unsigned min/max. These nodes are built from
select/icmp pairs matched at SDAGBuilder stage.

This patch adds the nodes, as well as legalization support and sets them to
be "expand" for all targets.

NFC for now; this will be tested when I switch AArch64 to using these new
nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237423 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDoxygen: Enable autobrief feature and update coding standards.
Matthias Braun [Fri, 15 May 2015 03:34:01 +0000 (03:34 +0000)]
Doxygen: Enable autobrief feature and update coding standards.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237417 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[PlaceSafepoints] Fix a bug that came in with rL236672.
Sanjoy Das [Fri, 15 May 2015 00:26:21 +0000 (00:26 +0000)]
[PlaceSafepoints] Fix a bug that came in with rL236672.

Transfer the calling convention from the invoke being replaced by
PlaceStatepoints to the new invoke to gc.statepoint created.  Add a test
case that would have caught this issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237414 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[PlaceSafepoints] Fix a bug that came in with rL236672.
Sanjoy Das [Fri, 15 May 2015 00:26:15 +0000 (00:26 +0000)]
[PlaceSafepoints] Fix a bug that came in with rL236672.

rL236672 would generate all invoke statepoints with deopt args set to a
list containing the single element "0", instead of an empty list.

Also add a test case that would have caught this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237413 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoStop resetting SanitizeAddress in TargetMachine::resetTargetOptions. NFC.
Akira Hatanaka [Fri, 15 May 2015 00:20:44 +0000 (00:20 +0000)]
Stop resetting SanitizeAddress in TargetMachine::resetTargetOptions. NFC.

Instead of doing that, create a temporary copy of MCTargetOptions and reset its
SanitizeAddress field based on the function's attribute every time an InlineAsm
instruction is emitted in AsmPrinter::EmitInlineAsm.

This is part of the work to remove TargetMachine::resetTargetOptions (the FIXME
added to TargetMachine.cpp in r236009 explains why this function has to be
removed).

Differential Revision: http://reviews.llvm.org/D9570

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237412 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix the check strings in a test case committed in r212455.
Akira Hatanaka [Fri, 15 May 2015 00:12:26 +0000 (00:12 +0000)]
Fix the check strings in a test case committed in r212455.

The access size (8, in this case) was missing in the function name that was
being checked.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237410 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agodocs: Fix up some .rst formatting
Justin Bogner [Thu, 14 May 2015 23:56:58 +0000 (23:56 +0000)]
docs: Fix up some .rst formatting

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237409 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: Avoid some UB caused by left shifting a negative value. NFC
Justin Bogner [Thu, 14 May 2015 23:54:49 +0000 (23:54 +0000)]
MC: Avoid some UB caused by left shifting a negative value. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237408 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ValueTracking] refactor: extract method haveNoCommonBitsSet
Jingyue Wu [Thu, 14 May 2015 23:53:19 +0000 (23:53 +0000)]
[ValueTracking] refactor: extract method haveNoCommonBitsSet

Summary:
Extract method haveNoCommonBitsSet so that we don't have to duplicate this logic in
InstCombine and SeparateConstOffsetFromGEP.

This patch also makes SeparateConstOffsetFromGEP more precise by passing
DominatorTree to computeKnownBits.

Test Plan: value-tracking-domtree.ll that tests ValueTracking indeed leverages dominating conditions

Reviewers: broune, meheff, majnemer

Reviewed By: majnemer

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D9734

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237407 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd a missing piece of existing practice to the developer policy. This may need furth...
Nick Lewycky [Thu, 14 May 2015 23:21:33 +0000 (23:21 +0000)]
Add a missing piece of existing practice to the developer policy. This may need further refinement, but I think is roughly correct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237405 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoYAML: Add support for literal block scalar I/O.
Alex Lorenz [Thu, 14 May 2015 23:08:22 +0000 (23:08 +0000)]
YAML: Add support for literal block scalar I/O.

This commit gives the users of the YAML Traits I/O library
the ability to serialize scalars using the YAML literal block
scalar notation by allowing them to implement a specialization
of the `BlockScalarTraits` struct for their custom types.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D9613

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237404 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago80-col fixups.
Eric Christopher [Thu, 14 May 2015 23:07:13 +0000 (23:07 +0000)]
80-col fixups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237403 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[lib/Fuzzer] Add SHA1 implementation from public domain.
Kostya Serebryany [Thu, 14 May 2015 22:41:49 +0000 (22:41 +0000)]
[lib/Fuzzer] Add SHA1 implementation from public domain.

Summary:
This adds a SHA1 implementation taken from public domain code.
The change is trivial, but as it involves third-party code I'd like
a second pair of eyes before commit.

LibFuzzer can not use SHA1 from openssl because openssl may not be available
and because we may be fuzzing openssl itself.
Using sha1sum via a pipe is too slow.

Test Plan: n/a

Reviewers: chandlerc

Reviewed By: chandlerc

Subscribers: majnemer, llvm-commits

Differential Revision: http://reviews.llvm.org/D9733

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237400 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReflow comments and remove one that predated the enum being in
Eric Christopher [Thu, 14 May 2015 22:29:46 +0000 (22:29 +0000)]
Reflow comments and remove one that predated the enum being in
the current file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237399 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove setting FloatABIType from the X86 port, nothing uses it.
Eric Christopher [Thu, 14 May 2015 22:26:54 +0000 (22:26 +0000)]
Remove setting FloatABIType from the X86 port, nothing uses it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237398 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd another InstCombine pass after LoopUnroll.
Wei Mi [Thu, 14 May 2015 22:02:54 +0000 (22:02 +0000)]
Add another InstCombine pass after LoopUnroll.

This is to cleanup some redundency generated by LoopUnroll pass. Such redundency may not be cleaned up by existing passes after LoopUnroll.

Differential Revision: http://reviews.llvm.org/D9777

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237395 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDon't rely on implicit pointerness of 'auto'.
Davide Italiano [Thu, 14 May 2015 21:52:12 +0000 (21:52 +0000)]
Don't rely on implicit pointerness of 'auto'.

This ends up being a copy. Pointy hat to me.
Reported by: dexonsmith, dblaikie

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237394 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix memory leak introduced in r237314.
Alex Lorenz [Thu, 14 May 2015 20:46:12 +0000 (20:46 +0000)]
Fix memory leak introduced in r237314.

The commit r237314 that implements YAML block parsing
introduced a leak that was caught by the ASAN linux buildbot.
YAML Parser stores its tokens in an ilist, and allocates
tokens using a BumpPtrAllocator, but doesn't call the
destructor for the allocated tokens. R237314 added an
std::string field to a Token which leaked as the Token's
destructor wasn't called. This commit fixes this leak
by calling the Token's destructor when a Token is being
removed from an ilist of tokens.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237389 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Generate hardware loop for a vectorized loop
Brendon Cahoon [Thu, 14 May 2015 20:36:19 +0000 (20:36 +0000)]
[Hexagon] Generate hardware loop for a vectorized loop

The induction variable in the vectorized loop wasn't
recognized properly, so a hardware loop wasn't generated.

Differential Revision: http://reviews.llvm.org/D9722

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237388 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTurn effective assert(0) into llvm_unreachable
Matthias Braun [Thu, 14 May 2015 18:33:29 +0000 (18:33 +0000)]
Turn effective assert(0) into llvm_unreachable

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237379 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUpdate obsolete comments, fix typo, delete trailing space.
Douglas Katzman [Thu, 14 May 2015 18:07:04 +0000 (18:07 +0000)]
Update obsolete comments, fix typo, delete trailing space.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237378 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ConstantFolding] Fix wrong folding of intrinsic 'convert.from.fp16'.
Andrea Di Biagio [Thu, 14 May 2015 18:01:48 +0000 (18:01 +0000)]
[ConstantFolding] Fix wrong folding of intrinsic 'convert.from.fp16'.

Function 'ConstantFoldScalarCall' (in ConstantFolding.cpp) works under the
wrong assumption that a call to 'convert.from.fp16' returns a value of
type 'float'.
However, intrinsic 'convert.from.fp16' can be overloaded; for example, we
can call 'convert.from.fp16.f64' to convert from half to double; etc.

Before this patch, the following example would have triggered an assertion
failure in opt (with -constprop):

```
define double @foo() {
entry:
  %0 = call double @llvm.convert.from.fp16.f64(i16 0)
  ret double %0
}
```

This patch fixes the problem in ConstantFolding.cpp. When folding a call to
convert.from.fp16, we perform a different kind of conversion based on the call
return type.

Added test 'Transform/ConstProp/convert-from-fp16.ll'.

Differential Revision: http://reviews.llvm.org/D9771

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237377 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoTargetSchedule: factor out common code; NFC
Matthias Braun [Thu, 14 May 2015 18:01:13 +0000 (18:01 +0000)]
TargetSchedule: factor out common code; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237376 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove MCInstrItineraries includes in parts that don't use them anymore
Matthias Braun [Thu, 14 May 2015 18:01:11 +0000 (18:01 +0000)]
Remove MCInstrItineraries includes in parts that don't use them anymore

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237375 91177308-0d34-0410-b5e6-96231b3b80d8