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Tighten a ARM dag combine condition to avoid an identity transformation, which
[oota-llvm.git]
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test
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CodeGen
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X86
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vec_shuffle-38.ll
2011-09-14
Bruno Cardoso Lopes
Vector shuffle mask <i32 4, i32 5, i32 2, i32 3> should...
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2011-08-31
Evan Cheng
Fix (movhps load) lowering / pattern to match more...
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2011-07-22
Rafael Espindola
Turn shuffles into unpacks for VT == MVT::v2i64 and...
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