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Taints the non-acquire RMW's store address with the load part
[oota-llvm.git]
/
test
/
CodeGen
/
R600
/ fceil64.ll
2015-06-13
Tom Stellard
R600 -> AMDGPU rename
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commitdiff
2015-03-23
Matt Arsenault
R600/SI: Allow commuting compares
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commitdiff
2015-02-13
Matt Arsenault
R600/SI: Minor test scheduling fixes
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commitdiff
2015-02-11
Marek Olsak
R600/SI: Enable a lot of existing tests for VI (squashe...
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2015-01-29
Tom Stellard
R600/SI: Define a schedule model and enable the generic...
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2015-01-06
Tom Stellard
R600/SI: Add a stub GCNTargetMachine
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2014-12-11
Matt Arsenault
R600/SI: Use unordered not equal instructions
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commitdiff
2014-12-03
Matt Arsenault
R600/SI: Remove i1 pseudo VALU ops
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2014-11-05
Tom Stellard
R600/SI: Change all instruction assembly names to lower...
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2014-10-03
Matt Arsenault
R600/SI: Fix ftrunc f64 conformance failures.
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2014-10-01
Tom Stellard
R600: Call EmitFunctionHeader() in the AsmPrinter to...
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commitdiff
2014-09-06
Matt Arsenault
R600/SI: Relax a few tests to help enable scheduler
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2014-06-18
Jan Vesely
R600: Expand vector fceil
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