Taints the non-acquire RMW's store address with the load part
[oota-llvm.git] / test / CodeGen / R600 / ds_read2.ll
2015-06-13 Tom StellardR600 -> AMDGPU rename
2015-04-08 Tom StellardR600/SI: Don't print offset0/offset1 DS operands when...
2015-03-13 David Blaikie[opaque pointer type] Add textual IR support for explic...
2015-02-27 David Blaikie[opaque pointer type] Add textual IR support for explic...
2015-02-27 David Blaikie[opaque pointer type] Add textual IR support for explic...
2015-01-06 Tom StellardR600/SI: Add a stub GCNTargetMachine
2014-11-13 Matt ArsenaultR600: Error on initializer for LDS.
2014-11-05 Tom StellardR600/SI: Change all instruction assembly names to lower...
2014-10-15 Matt ArsenaultR600/SI: Also try to use 0 base for misaligned 8-byte...
2014-10-14 Matt ArsenaultR600/SI: Use DS offsets for constant addresses
2014-10-10 Matt ArsenaultR600/SI: Change how DS offsets are printed
2014-10-10 Matt ArsenaultR600/SI: Match read2/write2 stride 64 versions
2014-10-10 Matt ArsenaultR600/SI: Add load / store machine optimizer pass.