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[mips][msa] MSA requires FR=1 mode (64-bit FPU register file). Report fatal error...
[oota-llvm.git] / test / CodeGen / Mips / msa / elm_cxcmsa.ll
2013-09-27 Daniel Sanders[mips][msa] MSA requires FR=1 mode (64-bit FPU register... blob | commitdiff | raw
2013-08-28 Daniel Sanders[mips][msa] Added cfcmsa, and ctcmsa blob | commitdiff | raw | diff to current
C/C++ LLVM-based compilers that forbids OOTA behaviors