After updating value handles for RAUW, check that no weak or tracking handles
[oota-llvm.git] / test / CodeGen / ARM /
2010-07-26 Anton KorobeynikovCurrently EH lowering code expects typeinfo to be globa...
2010-07-23 Evan Cheng- Allow target to specify when is register pressure...
2010-07-21 Evan ChengMore register pressure aware scheduling work.
2010-07-21 Eric ChristopherBaby steps towards ARM fast-isel.
2010-07-21 Rafael EspindolaFix calling convention on ARM if vfp2+ is enabled.
2010-07-17 Jim GrosbachAdd combiner patterns to more effectively utilize the...
2010-07-16 Jim GrosbachAdd basic support to code-gen the ARM/Thumb2 bit-field...
2010-07-15 Evan ChengSplit -enable-finite-only-fp-math to two options:
2010-07-14 Jim GrosbachImprove 64-subtraction of immediates when parts of...
2010-07-14 Bob WilsonAdd support for NEON VMVN immediate instructions.
2010-07-14 Bob WilsonAdd an ARM-specific DAG combining to avoid redundant...
2010-07-13 Bob WilsonUse a target-specific VMOVIMM DAG node instead of BUILD...
2010-07-13 Evan ChengExtend the r107852 optimization which turns some fp...
2010-07-11 Rafael EspindolaFix va_arg for doubles. With this patch VAARG nodes...
2010-07-09 Jim GrosbachIn the presence of variable sized objects, allocate...
2010-07-09 Jakob Stoklund OlesenFix test to be less sensitive of regalloc accidents
2010-07-09 Bob WilsonPrint "dregpair" NEON operands with a space between...
2010-07-09 Bob WilsonReenable DAG combining for vector shuffles. It looks...
2010-07-08 Evan ChengCheck for FiniteOnlyFPMath as well.
2010-07-08 Evan Chengr107852 is only safe with -enable-unsafe-fp-math to...
2010-07-08 Evan ChengOptimize some vfp comparisons to integer ones. This...
2010-07-08 Dale JohannesenChanges to ARM tail calls, mostly cosmetic.
2010-07-06 Rafael EspindolaDon't create neon moves in CopyRegToReg. NEONMoveFixPas...
2010-07-02 Bob WilsonFix incorrect asm-printing of some NEON immediates...
2010-07-01 Bill WendlingImplement the "linker_private_weak" linkage type. This...
2010-06-29 Jakob Stoklund OlesenFix the handling of partial redefines in the fast regis...
2010-06-29 Bob WilsonFix a register scavenger crash when dealing with undefi...
2010-06-29 Rafael EspindolaAdd a VT argument to getMinimalPhysRegClass and replace...
2010-06-28 Bob WilsonUnlike other targets, ARM now uses BUILD_VECTORs post...
2010-06-26 Rafael EspindolaWhen splitting a VAARG, remember its alignment.
2010-06-25 Daniel DunbarThumb2ITBlockPass: Fix a possible dereference of an...
2010-06-25 Evan ChengChange if-conversion block size limit checks to add...
2010-06-24 Dan GohmanTeach EmitLiveInCopies to omit copies for unused virtua...
2010-06-24 Bill WendlingIt's possible that a flag is added to the SDNode that...
2010-06-24 Jakob Stoklund OlesenReplace a big gob of old coalescer logic with the new...
2010-06-24 Dan GohmanEliminate the other half of the BRCOND optimization...
2010-06-24 Jakob Stoklund OlesenRevert "Replace a big gob of old coalescer logic with...
2010-06-24 Jakob Stoklund OlesenReplace a big gob of old coalescer logic with the new...
2010-06-23 Bill WendlingWe are missing opportunites to use ldm. Take code like...
2010-06-23 Dale JohannesenReinstate correct test, remove the real invalidated...
2010-06-23 Dale JohannesenRemove tests invalidated by previous checkin.
2010-06-22 Bob WilsonThumb1 functions using @llvm.returnaddress were not...
2010-06-21 Evan ChengFix PR7421: bug in kill transferring logic. It was...
2010-06-21 Dale JohannesenAdd missing FileCheck call.
2010-06-21 Dale JohannesenFix PR 7433. Silly typo in non-Darwin ARM tail call
2010-06-19 Evan ChengDisable sibcall optimization for Thumb1 for now since...
2010-06-18 Evan ChengAllow ARM if-converter to be run after post allocation...
2010-06-18 Evan ChengFix an inverted condition.
2010-06-18 Jakob Stoklund OlesenWhen using ADDri to get the address of a stack object...
2010-06-18 Dale JohannesenEnable tail calls on ARM by default, with some
2010-06-18 Jakob Stoklund OlesenTreat the ARM inline asm {cc} constraint as a physreg...
2010-06-17 Rafael EspindolaRemove arm_apcscc from the test files. It is the defaul...
2010-06-15 Jakob Stoklund OlesenRemove the local register allocator.
2010-06-15 Rafael EspindolaSet the mtriple in some tests so that they use AAPCS.
2010-06-15 Rafael EspindolaRemove the arm_aapcscc marker from the tests. It is...
2010-06-15 Bob WilsonGeneralize the pre-coalescing of extract_subregs feedin...
2010-06-11 Bob WilsonAdd a missing bitcast. This code used to only handle...
2010-06-04 Evan ChengRe-apply 105308 with fix.
2010-06-04 Dale JohannesenMore tail call removal.
2010-06-04 Dale JohannesenRemove more tail calls.
2010-06-04 Dale JohannesenRemove a tail call, and move some CHECKs to the
2010-06-03 Bob WilsonRevert 105308.
2010-06-02 Evan ChengEnable machine cse of instructions which define physica...
2010-05-28 Evan ChengFix some latency computation bugs: if the use is not...
2010-05-27 Jakob Stoklund OlesenAdd a -regalloc=default option that chooses a register...
2010-05-27 Evan Chengllvm can't correctly support 'H', 'Q' and 'R' modifiers...
2010-05-24 Evan ChengLR is in GPR, not tGPR even in Thumb1 mode.
2010-05-22 Evan ChengImplement @llvm.returnaddress. rdar://8015977.
2010-05-22 Bob WilsonRecognize more BUILD_VECTORs and VECTOR_SHUFFLEs that...
2010-05-21 Bob WilsonChange CodeGen/ARM/2009-11-02-NegativeLane.ll to use...
2010-05-21 Jakob Stoklund OlesenTeach VirtRegRewriter to handle spilling in instruction...
2010-05-21 Evan ChengChange ARM scheduling default to list-hybrid if the...
2010-05-20 Dan GohmanWhen canonicalizing icmp operand order to put the loop...
2010-05-20 Bob WilsonHandle Neon v2f64 and v2i64 vector shuffles as register...
2010-05-19 Dan GohmanTeach LSR how to cope better with unrolled loops on...
2010-05-19 Jakob Stoklund OlesenTwoAddressInstructionPass doesn't really know how to...
2010-05-19 Bob WilsonTestcase to go with 104141.
2010-05-19 Evan ChengIntrinsics which do a vector compare (results are all...
2010-05-18 Jakob Stoklund OlesenRemember to update VirtRegLastUse when spilling without...
2010-05-18 Evan ChengSink dag combine's post index load / store code that...
2010-05-18 Evan ChengFix PR7162: Use source register classes and sub-indices...
2010-05-18 Evan ChengFIX PR7158. SimplifyVBinOp was asserting when it fails...
2010-05-17 Evan ChengFix PR7175. Insert copies of a REG_SEQUENCE source...
2010-05-17 Evan ChengFix PR7156. If the sources of a REG_SEQUENCE are all...
2010-05-17 Evan ChengCareful with reg_sequence coalescing to not to overwrit...
2010-05-17 Evan ChengTurn on -neon-reg-sequence by default.
2010-05-17 Jakob Stoklund OlesenAvoid allocating the same physreg to multiple virtregs...
2010-05-15 Anton KorobeynikovSome cheap DAG combine goodness for multiplication...
2010-05-15 Evan ChengAllow TargetLowering::getRegClassFor() to be called...
2010-05-11 Jakob Stoklund OlesenKeep track of the last place a live virtreg was used.
2010-05-11 Evan ChengSelect @llvm.trap to the special B with 1111 condition...
2010-05-07 Duncan SandsCorrect some bogus target triples.
2010-05-05 Jim Grosbachfix copy/paste oops.
2010-05-05 Jim GrosbachAdd tests for ARMV7M divide instruction use
2010-05-05 Jim Grosbachremove unneeded underscores.
2010-05-05 Jim GrosbachConvert to filecheck
2010-05-03 Dan GohmanFix tests to use fadd, fsub, and fmul, instead of add...
2010-05-03 Dan GohmanFix a bug which prevented tail merging of return instru...
2010-05-02 Duncan SandsRemove the -enable-sjlj-eh option, which doesn't do...
2010-04-22 Jim GrosbachUpdate ARM DAGtoDAG for matching UBFX instruction for...
next