ARM pop of a single register encodes as post-indexed LDR.
[oota-llvm.git] / test / CodeGen / ARM / vext.ll
2011-03-15 Bill WendlingSome minor cleanups based on feedback.
2011-03-14 Bill WendlingGenerate a VTBL instruction instead of a series of...
2011-01-07 Bob WilsonLower some BUILD_VECTORS using VEXT+shuffle.
2010-08-17 Bob WilsonAllow more cases of undef shuffle indices and add tests...
2010-06-17 Rafael EspindolaRemove arm_apcscc from the test files. It is the defaul...
2009-09-09 Dan GohmanEliminate more uses of llvm-as and llvm-dis.
2009-08-21 Bob WilsonAdd some tests for vext.16 and vext.32.
2009-08-19 Bob WilsonAdd support for Neon VEXT (vector extract) shuffles.