ARM pop of a single register encodes as post-indexed LDR.
[oota-llvm.git] / test / CodeGen / ARM / 2010-06-29-PartialRedefFastAlloc.ll
2010-10-08 Bob WilsonChange register allocation order for ARM VFP and NEON...
2010-08-27 Bob WilsonAdd alignment arguments to all the NEON load/store...
2010-07-09 Jakob Stoklund OlesenFix test to be less sensitive of regalloc accidents
2010-07-09 Bob WilsonReenable DAG combining for vector shuffles. It looks...
2010-06-29 Jakob Stoklund OlesenFix the handling of partial redefines in the fast regis...