reimplement GetPointerBaseWithConstantOffset().
[oota-llvm.git] / lib / Target /
2012-12-31 Bill WendlingRemove the getAttributesAtIndex and getNumAttrs methods...
2012-12-30 Nuno Lopesconvert a bunch of callers from DataLayout::getIndexedO...
2012-12-30 Bill WendlingUse the predicate methods off of AttributeSet instead...
2012-12-30 Bill WendlingRemove the Function::getRetAttributes method in favor...
2012-12-30 Bill WendlingRemove Function::getParamAttributes and use the Attribu...
2012-12-30 Bill WendlingRemove the Function::getFnAttributes method in favor...
2012-12-30 Bill Wendlings/hasAttribute/contains/g to be more consistent with...
2012-12-29 Craig TopperRemove intrinsic specific instructions for (V)SQRTPS...
2012-12-29 Craig TopperMerge similar functionality using a nested switch.
2012-12-29 Craig TopperRemove intrinsic specific instructions for SSE/SSE2...
2012-12-29 Jakub StaszakSimplify code, no functionality change.
2012-12-29 Jakub StaszakDelete executive bit on ./lib/Target/Hexagon/HexagonAsm...
2012-12-28 Nadav RotemCostModel: initial checkin for code that estimates...
2012-12-28 Nadav Rotemwrap 80-col lines.
2012-12-28 Nadav RotemAVX: Move the ZEXT/ANYEXT DAGCo optimizations to the...
2012-12-27 Nadav RotemReverse the 'if' condition and reduce the indentation.
2012-12-27 Craig TopperMerge basic_sse12_fp_binop_p_int and basic_sse12_fp_bin...
2012-12-27 Nadav RotemAVX/AVX2: Move the SEXT lowering code from a target...
2012-12-27 Craig TopperMerge basic_sse12_fp_binop_p and basic_sse12_fp_binop_p...
2012-12-27 Nadav RotemOn AVX/AVX2 the type v8i1 is legalized to v8i16, which...
2012-12-27 Nadav RotemAVX/AVX2: Move the code that lowers vector-trunc from...
2012-12-27 Craig TopperAdd hasSideEffects=0 to some forms of ROUND, RCP, and...
2012-12-27 Craig TopperMove single letter 'P' prefix out of multiclass now...
2012-12-27 Craig TopperAdd hasSideEffects=0 to some shift and rotate instructi...
2012-12-27 Craig TopperMark the divide instructions as hasSideEffects=0.
2012-12-27 Craig TopperAdd hasSideEffects=0 to CMP*rr_REV.
2012-12-27 Craig TopperAdd mayLoad, mayStore, and hasSideEffects tags to BT...
2012-12-26 Craig TopperFix operands and encoding form for ARPL instruction...
2012-12-26 Craig TopperAdd hasSideEffects=0 to some atomic instructions.
2012-12-26 Craig TopperMark the AL/AX/EAX forms of the basic arithmetic operat...
2012-12-26 Craig TopperMark all the _REV instructions as not having side effec...
2012-12-26 Craig TopperRemove a special conditional setting of neverHasSideEff...
2012-12-26 Craig TopperMerge still more SSE/AVX instruction definitions.
2012-12-26 Craig TopperMerge more SSE/AVX instruction definitions.
2012-12-26 Craig TopperFix 80 column violation.
2012-12-26 Craig TopperFix class name in comment.
2012-12-26 Craig TopperMerge SSE/AVX PCMPEQ/PCMPGT instruction definitions.
2012-12-26 Craig TopperRemove 'v' from mnemonic to fix asm matching failures.
2012-12-26 Craig TopperUse an additional multiclass to merge the 128/256-bit...
2012-12-26 Nadav RotemReformat the docs.
2012-12-26 Craig TopperUse an additional multiclass to merge the 128/256-bit...
2012-12-26 Craig TopperMerge an AVX/SSE 256-bit and 128-bit multiclass.
2012-12-26 Craig TopperMark VANDNPD/VANDNPDS as not commutable.
2012-12-26 Craig TopperRemove alignment from a bunch more VEX encoded operatio...
2012-12-26 Craig TopperRemove alignment from folding table for VMOVUPD as...
2012-12-26 Craig TopperRemove alignment requirements from (V)EXTRACTPS. This...
2012-12-26 Craig TopperRemove alignment requirement from VCVTSS2SD in folding...
2012-12-25 Hal FinkelExpand PPC64 atomic load and store
2012-12-25 Benjamin KramerX86: Shave off one shuffle from the pcmpeqq sequence...
2012-12-25 Benjamin KramerX86: Custom lower <2 x i64> eq and ne when SSE41 is...
2012-12-25 Nadav RotemVCVTSS2SD requires a strict alignment. Thanks Elena.
2012-12-24 Nick LewyckyQuiet gcc's -Wparenthesis warning. No functionality...
2012-12-24 Benjamin KramerUse a std::string rather than a dynamically allocated...
2012-12-24 Nadav RotemCostModel: We have API for checking the costs of known...
2012-12-24 Nadav RotemSome x86 instructions can load/store one of the operand...
2012-12-24 Nadav RotemChange the codegen Cost Model API for shuffeles. This...
2012-12-23 Nadav RotemCostModel: Change the default target-independent implem...
2012-12-23 Nadav Rotemwhitespace
2012-12-23 Nadav RotemRename a function.
2012-12-23 Nadav RotemLoop Vectorizer: Update the cost model of scatter/gathe...
2012-12-22 Benjamin KramerX86: Turn mul of <4 x i32> into pmuludq when no SSE4...
2012-12-22 Benjamin KramerX86: Emit vector sext as shuffle + sra if vpmovsx is...
2012-12-21 Nadav RotemIn some cases, due to scheduling constraints we copy...
2012-12-21 Akira Hatanaka[mips] Refactor subword-swap, EXT/INS, load-effective...
2012-12-21 Akira Hatanaka[mips] Refactor SYNC and multiply/divide instructions.
2012-12-21 Akira Hatanaka[mips] Refactor BAL instructions.
2012-12-21 Akira Hatanaka[mips] Fix encoding of BAL instruction. Also, fix assem...
2012-12-21 Akira Hatanaka[mips] Refactor jump, jump register, jump-and-link...
2012-12-21 Akira Hatanaka[mips] Refactor load/store left/right and load-link...
2012-12-21 Akira Hatanaka[mips] Refactor load/store instructions.
2012-12-21 Akira Hatanaka[mips] Remove unnecessary isPseudo parameter.
2012-12-21 Akira Hatanaka[mips] Refactor LUI instruction.
2012-12-21 Akira Hatanaka[mips] Refactor count leading zero or one instructions.
2012-12-21 Akira Hatanaka[mips] Refactor sign-extension-in-register instructions.
2012-12-21 Akira Hatanaka[mips] Refactor instructions which copy from and to...
2012-12-21 Akira Hatanaka[mips] Refactor logical NOR instructions.
2012-12-21 Akira Hatanaka[mips] Move instruction definitions in MipsInstrInfo.td.
2012-12-21 Tom StellardR600: Coding style - remove empty spaces from the begin...
2012-12-21 Tom StellardR600: Fix MAX_UINT definition
2012-12-21 Tom StellardR600: Add SHADOWCUBE to TEX_SHADOW pattern
2012-12-21 Benjamin KramerCleanup compiler warnings on discarding type qualifiers...
2012-12-21 Benjamin KramerX86: Match pmin/pmax as a target specific dag combine...
2012-12-21 Roman DivackyRemove duplicate includes.
2012-12-21 Tom StellardR600: Expand vec4 INT <-> FP conversions
2012-12-21 Benjamin KramerX86: Match the SSE/AVX min/max vector ops using a custo...
2012-12-21 Nadav RotemAdd a missing "virtual" keyword.
2012-12-21 Quentin ColombetAdd ARM cortex-r5 subtarget.
2012-12-21 Nadav RotemImprove the X86 cost model for loads and stores.
2012-12-21 Nadav RotemBB-Vectorizer: Check the cost of the store pointer...
2012-12-21 Reed KotlerCall llvm_unreachable instead of assert.
2012-12-20 Jakob Stoklund OlesenAdd an MF argument to MI::copyImplicitOps().
2012-12-20 Jakob Stoklund OlesenMachineInstrBuilderize ARM.
2012-12-20 Jakob Stoklund OlesenMachineInstrBuilderize NVPTX.
2012-12-20 Bob WilsonRevert "Adding support for llvm.arm.neon.vaddl[su]...
2012-12-20 Evan ChengOn some ARM cpus, flags setting movs with shifter opera...
2012-12-20 Roman DivackyRemove MCTargetAsmLexer and its derived classes now...
2012-12-20 Renato GolinAdding support for llvm.arm.neon.vaddl[su].* and
2012-12-20 Reed KotlerImplement cfi_def_cfa_offset. "Make check" test case...
2012-12-20 Reed KotlerThere is one more patch to finish large frames. Make...
2012-12-20 Jyotsna VermaAdd constant extender support to GP-relative load/store...
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