R600/SI: Add more special cases for opcodes to ensureSRegLimit()
[oota-llvm.git] / lib / Target / R600 / R600InstrInfo.h
2013-07-31 Tom StellardRevert "R600: Use SchedModel enum for is{Trans,Vector...
2013-07-31 Vincent LejeuneR600: Use SchedModel enum for is{Trans,Vector}Only...
2013-07-23 Tom StellardR600: Move CONST_ADDRESS folding into AMDGPUDAGToDAGISe...
2013-06-29 Vincent LejeuneR600: Support schedule and packetization of trans-only...
2013-06-29 Vincent LejeuneR600: Bank Swizzle now display SCL equivalent
2013-06-28 Tom StellardR600: Add local memory support via LDS
2013-06-28 Tom StellardR600: Add support for GROUP_BARRIER instruction
2013-06-25 Tom StellardR600: Use new getNamedOperandIdx function generated...
2013-06-07 Tom StellardR600: Rework subtarget info and remove AMDILDevice...
2013-06-04 Vincent LejeuneR600: Const/Neg/Abs can be folded to dot4
2013-05-17 Vincent LejeuneR600: Relax some vector constraints on Dot4.
2013-05-17 Vincent LejeuneR600: Some factorization
2013-04-30 Vincent LejeuneR600: Rework Scheduling to handle difference between...
2013-04-30 Vincent LejeuneR600: Add FetchInst bit to instruction defs to denote...
2013-04-03 Vincent LejeuneR600: Factorize maximum alu per clause in a single...
2013-03-14 Vincent LejeuneR600: Factorize code handling Const Read Port limitation
2013-02-06 Tom StellardR600: Support for indirect addressing v4
2013-01-02 Chandler CarruthResort the #include lines in include/... and lib/....
2012-12-11 Tom StellardAdd R600 backend