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- Add TargetInstrInfo::getOperandLatency() to compute operand latencies. This
[oota-llvm.git]
/
lib
/
Target
/
ARM
/
ARMScheduleV6.td
2010-10-06
Evan Cheng
- Add TargetInstrInfo::getOperandLatency() to compute...
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2010-09-30
Evan Cheng
ARM instruction itinerary fixes:
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2010-09-29
Evan Cheng
Separate itinerary classes for mvn from mov; for tst...
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2010-09-29
Evan Cheng
Assign bitwise binary instructions different itinerary...
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2010-09-28
Evan Cheng
Add support to model pipeline bypass / forwarding.
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2010-09-25
Evan Cheng
Remove a unused instruction itinerary class.
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2010-09-25
Evan Cheng
Fix zero and sign extension instructions scheduling...
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2010-09-24
Evan Cheng
More pseudo instruction scheduling itinerary fixes.
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2010-09-09
Evan Cheng
For each instruction itinerary class, specify the numbe...
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2010-06-02
Jim Grosbach
Clean up 80 column violations. No functional change.
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2010-04-18
Anton Korobeynikov
Make processor FUs unique for given itinerary. This...
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2009-11-18
David Goodwin
Add ARMv6 itineraries.
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2009-09-23
David Goodwin
Checkpoint NEON scheduling itineraries.
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2009-09-21
David Goodwin
Add Cortex-A8 VFP model.
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2009-08-19
David Goodwin
Update Cortex-A8 instruction itineraries for integer...
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2009-08-15
Evan Cheng
Turn on if-conversion for thumb2.
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2009-08-13
David Goodwin
Finalize itineraries for cortex-a8 integer multiply
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2009-08-11
David Goodwin
Allow a zero cycle stage to reserve/require a FU withou...
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2009-08-10
David Goodwin
Checkpoint scheduling itinerary changes.
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2009-07-21
Evan Cheng
Fix comment.
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2009-06-19
Evan Cheng
Latency information for ARM v6. It's rough and not...
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