Lower CONCAT_VECTOR during legalization instead of matching it during isel.
[oota-llvm.git] / lib / Target / ARM / ARM.td
2009-07-21 Evan ChengAdd fake v7 itineraries for now.
2009-07-08 Evan ChengAdd a Thumb2 instruction flag to that indicates whether...
2009-06-19 Evan ChengLatency information for ARM v6. It's rough and not...
2009-06-08 Anton KorobeynikovSeparate V6 from V6T2 since the latter has some extra...
2009-05-29 Anton KorobeynikovAdd placeholder for thumb2 stuff
2009-05-23 Anton KorobeynikovAdd ARMv7 architecture, Cortex processors and different...
2009-04-17 Bob WilsonUse CallConvLower.h and TableGen descriptions of the...
2008-11-24 Evan ChengMove target independent td files from lib/Target/ to...
2008-11-06 Evan ChengRemove opcode from instruction TS flags; add MOVCC...
2008-11-05 Evan ChengRestructure ARM code emitter to use instruction formats...
2007-12-29 Chris LattnerRemove attribution from file headers, per discussion...
2007-08-07 Evan ChengInitial JIT support for ARM by Raul Fernandes Herbster.
2007-05-04 Lauro Ramos VenancioAdd a processor.
2007-01-19 Evan ChengARM backend contribution from Apple.
2006-05-18 Evan ChenggetCalleeSaveRegs and getCalleeSaveRegClasses are no...
2006-05-17 Evan ChengRemove PointerType from class Target
2006-05-14 Rafael Espindolaadded a skeleton of the ARM backend