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Taints the non-acquire RMW's store address with the load part
[oota-llvm.git]
/
lib
/
Target
/
AMDGPU
/ AMDGPUTargetMachine.cpp
2016-01-26
Tom Stellard
Merging r258386:
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2016-01-13
Nicolai Haehnle
AMDGPU/SI: Add SI Machine Scheduler
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2015-12-15
Tom Stellard
AMDGPU/SI: Select constant loads with non-uniform addre...
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2015-12-10
Tom Stellard
AMDGPU/SI: Emit constant arrays in the .text section
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2015-11-30
Matt Arsenault
AMDGPU: Remove SIPrepareScratchRegs
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2015-11-06
Matt Arsenault
AMDGPU: Add pass to detect used kernel features
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2015-11-03
Matt Arsenault
AMDGPU: Initialize SIFixSGPRCopies so -print-after...
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2015-10-12
Matt Arsenault
AMDGPU: Register some more passes so -print-before...
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2015-10-08
Justin Bogner
CodeGen: print and verify after TargetPassConfig::inser...
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2015-10-07
Matt Arsenault
AMDGPU: Properly register passes
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2015-10-01
Matt Arsenault
AMDGPU: Move SIFixSGPRLiveRanges to be a regalloc pass
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2015-09-25
Tom Stellard
AMDGPU/SI: Use .hsatext section instead of .text for HSA
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2015-09-25
Matt Arsenault
AMDGPU: Disable some passes that are not meaningful
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2015-09-16
Eric Christopher
constify the Function parameter to the TTI creation...
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2015-08-22
Matt Arsenault
AMDGPU: Make sure to run verifier after SIFixSGPRLiveRanges
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2015-08-07
Tom Stellard
AMDGPU: Add pass to lower OpenCL image and sampler...
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2015-07-14
Matt Arsenault
AMDGPU/SI: Fix read2 merging into a super register.
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2015-07-09
Mehdi Amini
Make TargetTransformInfo keeping a reference to the...
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2015-07-06
Matt Arsenault
AMDGPU: Run SIInsertWaits as pre-emit pass
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2015-06-13
Tom Stellard
R600 -> AMDGPU rename
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2012-07-16
Tom Stellard
Revert "AMDGPU: Add core backend files for R600/SI...
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2012-07-16
Tom Stellard
AMDGPU: Add core backend files for R600/SI codegen v6
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