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(parent: bfb9bab) | patch
[mips][msa] Made the operand register sets optional for the I5 and SI5 formats
authorDaniel Sanders <daniel.sanders@imgtec.com>
Fri, 6 Sep 2013 12:23:19 +0000 (12:23 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Fri, 6 Sep 2013 12:23:19 +0000 (12:23 +0000)
commit7d3da67611e9ce7541a8987dcb7964f69de071aa
tree069bebded9457ad37ecf1f61145b25c7c8875032tree | snapshot
parentbfb9bab2434e3a8c4452708995a7f5d4f5a3b20ecommit | diff
[mips][msa] Made the operand register sets optional for the I5 and SI5 formats

Their default is to be the same as the result register set.

No functional change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190141 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MipsMSAInstrInfo.td diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors