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(parent: aff1c64) | patch
[mips][msa] Made the operand register sets optional for the BIT_[BHWD] formats
authorDaniel Sanders <daniel.sanders@imgtec.com>
Fri, 6 Sep 2013 12:10:24 +0000 (12:10 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Fri, 6 Sep 2013 12:10:24 +0000 (12:10 +0000)
commitbfb9bab2434e3a8c4452708995a7f5d4f5a3b20e
treee0a16f2c0d81c84fe88973c70e7a3c4a33eaf66ftree | snapshot
parentaff1c6427ce22125adfa29de4145030aa3214a2ecommit | diff
[mips][msa] Made the operand register sets optional for the BIT_[BHWD] formats

Their default is to be the same as the result register set.

No functional change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190140 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MipsMSAInstrInfo.td diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors