In Thumb1, the register scavenger is not always able to use an emergency
authorJim Grosbach <grosbach@apple.com>
Mon, 5 Oct 2009 22:30:23 +0000 (22:30 +0000)
committerJim Grosbach <grosbach@apple.com>
Mon, 5 Oct 2009 22:30:23 +0000 (22:30 +0000)
commit540b05d227a79443b2a7b07d5152a35cb6392abf
treeb02075b715dc9df259f755e3f0558a53d3871675
parent303bf73ebdfe66b1538351b26aa3d84c4b2e35c8
In Thumb1, the register scavenger is not always able to use an emergency
spill slot. When frame references are via the frame pointer, they will be
negative, but Thumb1 load/store instructions only allow positive immediate
offsets. Instead, Thumb1 will spill to R12.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83336 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/Target/TargetRegisterInfo.h
lib/CodeGen/RegisterScavenging.cpp
lib/Target/ARM/ARMBaseRegisterInfo.cpp
lib/Target/ARM/Thumb1RegisterInfo.cpp
lib/Target/ARM/Thumb1RegisterInfo.h