-//===- TableGen.cpp - Top-Level TableGen implementation -------------------===//
+//===- TableGen.cpp - Top-Level TableGen implementation for LLVM ----------===//
//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
-// TableGen is a tool which can be used to build up a description of something,
-// then invoke one or more "tablegen backends" to emit information about the
-// description in some predefined format. In practice, this is used by the LLVM
-// code generators to automate generation of a code generator through a
-// high-level description of the target.
+// This file contains the main function for LLVM's TableGen.
//
//===----------------------------------------------------------------------===//
-#include "Record.h"
-#include "TGParser.h"
+#include "TableGenBackends.h" // Declares all backends.
+#include "SetTheory.h"
#include "llvm/Support/CommandLine.h"
-#include "llvm/Support/Streams.h"
-#include "llvm/System/Signals.h"
-#include "llvm/Support/FileUtilities.h"
-#include "llvm/Support/MemoryBuffer.h"
-#include "CallingConvEmitter.h"
-#include "CodeEmitterGen.h"
-#include "RegisterInfoEmitter.h"
-#include "InstrInfoEmitter.h"
-#include "AsmWriterEmitter.h"
-#include "DAGISelEmitter.h"
-#include "SubtargetEmitter.h"
-#include "IntrinsicEmitter.h"
-#include <algorithm>
-#include <cstdio>
-#include <fstream>
-#include <ios>
+#include "llvm/Support/PrettyStackTrace.h"
+#include "llvm/Support/Signals.h"
+#include "llvm/TableGen/Error.h"
+#include "llvm/TableGen/Main.h"
+#include "llvm/TableGen/Record.h"
+
using namespace llvm;
enum ActionType {
PrintRecords,
GenEmitter,
- GenRegisterEnums, GenRegister, GenRegisterHeader,
- GenInstrEnums, GenInstrs, GenAsmWriter,
+ GenRegisterInfo,
+ GenInstrInfo,
+ GenAsmWriter,
+ GenAsmMatcher,
+ GenDisassembler,
+ GenPseudoLowering,
GenCallingConv,
GenDAGISel,
+ GenDFAPacketizer,
+ GenFastISel,
GenSubtarget,
GenIntrinsic,
- PrintEnums
+ GenTgtIntrinsic,
+ PrintEnums,
+ PrintSets,
+ GenOptParserDefs
};
namespace {
"Print all records to stdout (default)"),
clEnumValN(GenEmitter, "gen-emitter",
"Generate machine code emitter"),
- clEnumValN(GenRegisterEnums, "gen-register-enums",
- "Generate enum values for registers"),
- clEnumValN(GenRegister, "gen-register-desc",
- "Generate a register info description"),
- clEnumValN(GenRegisterHeader, "gen-register-desc-header",
- "Generate a register info description header"),
- clEnumValN(GenInstrEnums, "gen-instr-enums",
- "Generate enum values for instructions"),
- clEnumValN(GenInstrs, "gen-instr-desc",
+ clEnumValN(GenRegisterInfo, "gen-register-info",
+ "Generate registers and register classes info"),
+ clEnumValN(GenInstrInfo, "gen-instr-info",
"Generate instruction descriptions"),
clEnumValN(GenCallingConv, "gen-callingconv",
"Generate calling convention descriptions"),
clEnumValN(GenAsmWriter, "gen-asm-writer",
"Generate assembly writer"),
+ clEnumValN(GenDisassembler, "gen-disassembler",
+ "Generate disassembler"),
+ clEnumValN(GenPseudoLowering, "gen-pseudo-lowering",
+ "Generate pseudo instruction lowering"),
+ clEnumValN(GenAsmMatcher, "gen-asm-matcher",
+ "Generate assembly instruction matcher"),
clEnumValN(GenDAGISel, "gen-dag-isel",
"Generate a DAG instruction selector"),
+ clEnumValN(GenDFAPacketizer, "gen-dfa-packetizer",
+ "Generate DFA Packetizer for VLIW targets"),
+ clEnumValN(GenFastISel, "gen-fast-isel",
+ "Generate a \"fast\" instruction selector"),
clEnumValN(GenSubtarget, "gen-subtarget",
"Generate subtarget enumerations"),
clEnumValN(GenIntrinsic, "gen-intrinsic",
"Generate intrinsic information"),
+ clEnumValN(GenTgtIntrinsic, "gen-tgt-intrinsic",
+ "Generate target intrinsic information"),
clEnumValN(PrintEnums, "print-enums",
"Print enum values for a class"),
+ clEnumValN(PrintSets, "print-sets",
+ "Print expanded sets for testing DAG exprs"),
+ clEnumValN(GenOptParserDefs, "gen-opt-parser-defs",
+ "Generate option definitions"),
clEnumValEnd));
cl::opt<std::string>
Class("class", cl::desc("Print Enum list for this class"),
- cl::value_desc("class name"));
-
- cl::opt<std::string>
- OutputFilename("o", cl::desc("Output filename"), cl::value_desc("filename"),
- cl::init("-"));
-
- cl::opt<std::string>
- InputFilename(cl::Positional, cl::desc("<input file>"), cl::init("-"));
+ cl::value_desc("class name"));
+
+bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) {
+ switch (Action) {
+ case PrintRecords:
+ OS << Records; // No argument, dump all contents
+ break;
+ case GenEmitter:
+ EmitCodeEmitter(Records, OS);
+ break;
+ case GenRegisterInfo:
+ EmitRegisterInfo(Records, OS);
+ break;
+ case GenInstrInfo:
+ EmitInstrInfo(Records, OS);
+ break;
+ case GenCallingConv:
+ EmitCallingConv(Records, OS);
+ break;
+ case GenAsmWriter:
+ EmitAsmWriter(Records, OS);
+ break;
+ case GenAsmMatcher:
+ EmitAsmMatcher(Records, OS);
+ break;
+ case GenDisassembler:
+ EmitDisassembler(Records, OS);
+ break;
+ case GenPseudoLowering:
+ EmitPseudoLowering(Records, OS);
+ break;
+ case GenDAGISel:
+ EmitDAGISel(Records, OS);
+ break;
+ case GenDFAPacketizer:
+ EmitDFAPacketizer(Records, OS);
+ break;
+ case GenFastISel:
+ EmitFastISel(Records, OS);
+ break;
+ case GenSubtarget:
+ EmitSubtarget(Records, OS);
+ break;
+ case GenIntrinsic:
+ EmitIntrinsics(Records, OS);
+ break;
+ case GenTgtIntrinsic:
+ EmitIntrinsics(Records, OS, true);
+ break;
+ case GenOptParserDefs:
+ EmitOptParser(Records, OS);
+ break;
+ case PrintEnums:
+ {
+ std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);
+ for (unsigned i = 0, e = Recs.size(); i != e; ++i)
+ OS << Recs[i]->getName() << ", ";
+ OS << "\n";
+ break;
+ }
+ case PrintSets:
+ {
+ SetTheory Sets;
+ Sets.addFieldExpander("Set", "Elements");
+ std::vector<Record*> Recs = Records.getAllDerivedDefinitions("Set");
+ for (unsigned i = 0, e = Recs.size(); i != e; ++i) {
+ OS << Recs[i]->getName() << " = [";
+ const std::vector<Record*> *Elts = Sets.expand(Recs[i]);
+ assert(Elts && "Couldn't expand Set instance");
+ for (unsigned ei = 0, ee = Elts->size(); ei != ee; ++ei)
+ OS << ' ' << (*Elts)[ei]->getName();
+ OS << " ]\n";
+ }
+ break;
+ }
+ }
- cl::list<std::string>
- IncludeDirs("I", cl::desc("Directory of include files"),
- cl::value_desc("directory"), cl::Prefix);
+ return false;
}
-
-RecordKeeper llvm::Records;
-
-/// ParseFile - this function begins the parsing of the specified tablegen
-/// file.
-static bool ParseFile(const std::string &Filename,
- const std::vector<std::string> &IncludeDirs) {
- std::string ErrorStr;
- MemoryBuffer *F = MemoryBuffer::getFileOrSTDIN(&Filename[0], Filename.size(),
- &ErrorStr);
- if (F == 0) {
- cerr << "Could not open input file '" + Filename + "': " << ErrorStr <<"\n";
- return true;
- }
-
- TGParser Parser(F);
-
- // Record the location of the include directory so that the lexer can find
- // it later.
- Parser.setIncludeDirs(IncludeDirs);
-
- return Parser.ParseFile();
}
int main(int argc, char **argv) {
+ sys::PrintStackTraceOnErrorSignal();
+ PrettyStackTraceProgram X(argc, argv);
cl::ParseCommandLineOptions(argc, argv);
- // Parse the input file.
- if (ParseFile(InputFilename, IncludeDirs))
- return 1;
-
- std::ostream *Out = cout.stream();
- if (OutputFilename != "-") {
- Out = new std::ofstream(OutputFilename.c_str());
-
- if (!Out->good()) {
- cerr << argv[0] << ": error opening " << OutputFilename << "!\n";
- return 1;
- }
-
- // Make sure the file gets removed if *gasp* tablegen crashes...
- sys::RemoveFileOnSignal(sys::Path(OutputFilename));
- }
-
- try {
- switch (Action) {
- case PrintRecords:
- *Out << Records; // No argument, dump all contents
- break;
- case GenEmitter:
- CodeEmitterGen(Records).run(*Out);
- break;
-
- case GenRegisterEnums:
- RegisterInfoEmitter(Records).runEnums(*Out);
- break;
- case GenRegister:
- RegisterInfoEmitter(Records).run(*Out);
- break;
- case GenRegisterHeader:
- RegisterInfoEmitter(Records).runHeader(*Out);
- break;
-
- case GenInstrEnums:
- InstrInfoEmitter(Records).runEnums(*Out);
- break;
- case GenInstrs:
- InstrInfoEmitter(Records).run(*Out);
- break;
- case GenCallingConv:
- CallingConvEmitter(Records).run(*Out);
- break;
- case GenAsmWriter:
- AsmWriterEmitter(Records).run(*Out);
- break;
-
- case GenDAGISel:
- DAGISelEmitter(Records).run(*Out);
- break;
- case GenSubtarget:
- SubtargetEmitter(Records).run(*Out);
- break;
- case GenIntrinsic:
- IntrinsicEmitter(Records).run(*Out);
- break;
- case PrintEnums:
- {
- std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);
- for (unsigned i = 0, e = Recs.size(); i != e; ++i)
- *Out << Recs[i]->getName() << ", ";
- *Out << "\n";
- break;
- }
- default:
- assert(1 && "Invalid Action");
- return 1;
- }
- } catch (const std::string &Error) {
- cerr << argv[0] << ": " << Error << "\n";
- if (Out != cout.stream()) {
- delete Out; // Close the file
- std::remove(OutputFilename.c_str()); // Remove the file, it's broken
- }
- return 1;
- } catch (...) {
- cerr << argv[0] << ": Unknown unexpected exception occurred.\n";
- if (Out != cout.stream()) {
- delete Out; // Close the file
- std::remove(OutputFilename.c_str()); // Remove the file, it's broken
- }
- return 2;
- }
-
- if (Out != cout.stream()) {
- delete Out; // Close the file
- }
- return 0;
+ return TableGenMain(argv[0], &LLVMTableGenMain);
}