Fixed a nasty layering violation in the edis source

[oota-llvm.git] / utils / TableGen / TableGen.cpp

diff --git a/utils/TableGen/TableGen.cpp b/utils/TableGen/TableGen.cpp
index 3e284f941966842192d20b308d976b839b8553b3..1c66399ce8b9fcd56bcfee8ce6f19c12ede6bad8 100644 (file)
--- a/utils/TableGen/TableGen.cpp
+++ b/utils/TableGen/TableGen.cpp
@@ -15,23 +15,26 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "Record.h"
-#include "TGParser.h"
+#include "AsmMatcherEmitter.h"
+#include "AsmWriterEmitter.h"
 #include "CallingConvEmitter.h"
+#include "ClangDiagnosticsEmitter.h"
 #include "CodeEmitterGen.h"
-#include "RegisterInfoEmitter.h"
-#include "InstrInfoEmitter.h"
-#include "InstrEnumEmitter.h"
-#include "AsmWriterEmitter.h"
-#include "AsmMatcherEmitter.h"
 #include "DAGISelEmitter.h"
+#include "DisassemblerEmitter.h"
+#include "EDEmitter.h"
 #include "FastISelEmitter.h"
-#include "SubtargetEmitter.h"
+#include "InstrEnumEmitter.h"
+#include "InstrInfoEmitter.h"
 #include "IntrinsicEmitter.h"
 #include "LLVMCConfigurationEmitter.h"
-#include "ClangDiagnosticsEmitter.h"
+#include "OptParserEmitter.h"
+#include "Record.h"
+#include "RegisterInfoEmitter.h"
+#include "ARMDecoderEmitter.h"
+#include "SubtargetEmitter.h"
+#include "TGParser.h"
 #include "llvm/Support/CommandLine.h"
-#include "llvm/Support/FileUtilities.h"
 #include "llvm/Support/MemoryBuffer.h"
 #include "llvm/Support/PrettyStackTrace.h"
 #include "llvm/Support/raw_ostream.h"
@@ -45,15 +48,19 @@ enum ActionType {
   GenEmitter,
   GenRegisterEnums, GenRegister, GenRegisterHeader,
   GenInstrEnums, GenInstrs, GenAsmWriter, GenAsmMatcher,
+  GenARMDecoder,
+  GenDisassembler,
   GenCallingConv,
   GenClangDiagsDefs,
   GenClangDiagGroups,
   GenDAGISel,
   GenFastISel,
+  GenOptParserDefs, GenOptParserImpl,
   GenSubtarget,
   GenIntrinsic,
   GenTgtIntrinsic,
   GenLLVMCConf,
+  GenEDHeader, GenEDInfo,
   PrintEnums
 };
 
@@ -78,12 +85,20 @@ namespace {
                                "Generate calling convention descriptions"),
                     clEnumValN(GenAsmWriter, "gen-asm-writer",
                                "Generate assembly writer"),
+                    clEnumValN(GenARMDecoder, "gen-arm-decoder",
+                               "Generate decoders for ARM/Thumb"),
+                    clEnumValN(GenDisassembler, "gen-disassembler",
+                               "Generate disassembler"),
                     clEnumValN(GenAsmMatcher, "gen-asm-matcher",
                                "Generate assembly instruction matcher"),
                     clEnumValN(GenDAGISel, "gen-dag-isel",
                                "Generate a DAG instruction selector"),
                     clEnumValN(GenFastISel, "gen-fast-isel",
                                "Generate a \"fast\" instruction selector"),
+                    clEnumValN(GenOptParserDefs, "gen-opt-parser-defs",
+                               "Generate option definitions"),
+                    clEnumValN(GenOptParserImpl, "gen-opt-parser-impl",
+                               "Generate option parser implementation"),
                     clEnumValN(GenSubtarget, "gen-subtarget",
                                "Generate subtarget enumerations"),
                     clEnumValN(GenIntrinsic, "gen-intrinsic",
@@ -96,6 +111,10 @@ namespace {
                                "Generate Clang diagnostic groups"),
                     clEnumValN(GenLLVMCConf, "gen-llvmc",
                                "Generate LLVMC configuration library"),
+                    clEnumValN(GenEDHeader, "gen-enhanced-disassembly-header",
+                               "Generate enhanced disassembly info header"),
+                    clEnumValN(GenEDInfo, "gen-enhanced-disassembly-info",
+                               "Generate enhanced disassembly info"),
                     clEnumValN(PrintEnums, "print-enums",
                                "Print enum values for a class"),
                     clEnumValEnd));
@@ -171,8 +190,7 @@ int main(int argc, char **argv) {
   raw_ostream *Out = &outs();
   if (OutputFilename != "-") {
     std::string Error;
-    Out = new raw_fd_ostream(OutputFilename.c_str(), Error,
-                             raw_fd_ostream::F_Force);
+    Out = new raw_fd_ostream(OutputFilename.c_str(), Error);
 
     if (!Error.empty()) {
       errs() << argv[0] << ": error opening " << OutputFilename 
@@ -214,6 +232,9 @@ int main(int argc, char **argv) {
     case GenAsmWriter:
       AsmWriterEmitter(Records).run(*Out);
       break;
+    case GenARMDecoder:
+      ARMDecoderEmitter(Records).run(*Out);
+      break;
     case GenAsmMatcher:
       AsmMatcherEmitter(Records).run(*Out);
       break;
@@ -222,7 +243,16 @@ int main(int argc, char **argv) {
       break;
     case GenClangDiagGroups:
       ClangDiagGroupsEmitter(Records).run(*Out);
-      break;        
+      break;
+    case GenDisassembler:
+      DisassemblerEmitter(Records).run(*Out);
+      break;
+    case GenOptParserDefs:
+      OptParserEmitter(Records, true).run(*Out);
+      break;
+    case GenOptParserImpl:
+      OptParserEmitter(Records, false).run(*Out);
+      break;
     case GenDAGISel:
       DAGISelEmitter(Records).run(*Out);
       break;
@@ -241,6 +271,12 @@ int main(int argc, char **argv) {
     case GenLLVMCConf:
       LLVMCConfigurationEmitter(Records).run(*Out);
       break;
+    case GenEDHeader:
+      EDEmitter(Records).runHeader(*Out);
+      break;
+    case GenEDInfo:
+      EDEmitter(Records).run(*Out);
+      break;
     case PrintEnums:
     {
       std::vector<Record*> Recs = Records.getAllDerivedDefinitions(Class);