#include "Record.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/STLExtras.h"
-#include "llvm/Support/Streams.h"
-#include <set>
#include <algorithm>
+#include <set>
using namespace llvm;
// runEnums - Print out enum values for all of the registers.
-void RegisterInfoEmitter::runEnums(std::ostream &OS) {
+void RegisterInfoEmitter::runEnums(raw_ostream &OS) {
CodeGenTarget Target;
const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
OS << "} // End llvm namespace \n";
}
-void RegisterInfoEmitter::runHeader(std::ostream &OS) {
+void RegisterInfoEmitter::runHeader(raw_ostream &OS) {
EmitSourceFileHeader("Register Information Header Fragment", OS);
CodeGenTarget Target;
const std::string &TargetName = Target.getName();
<< " virtual bool needsStackRealignment(const MachineFunction &) const\n"
<< " { return false; }\n"
<< " unsigned getSubReg(unsigned RegNo, unsigned Index) const;\n"
+ << " unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;\n"
<< "};\n\n";
const std::vector<CodeGenRegisterClass> &RegisterClasses =
std::map<Record*, std::set<Record*>, LessRecord> &SuperRegs,
std::map<Record*, std::set<Record*>, LessRecord> &Aliases) {
if (R == S) {
- cerr << "Error: recursive sub-register relationship between"
- << " register " << getQualifiedName(R)
- << " and its sub-registers?\n";
+ errs() << "Error: recursive sub-register relationship between"
+ << " register " << getQualifiedName(R)
+ << " and its sub-registers?\n";
abort();
}
if (!SuperRegs[R].insert(S).second)
std::map<Record*, std::set<Record*>, LessRecord> &SuperRegs,
std::map<Record*, std::set<Record*>, LessRecord> &Aliases) {
if (R == S) {
- cerr << "Error: recursive sub-register relationship between"
- << " register " << getQualifiedName(R)
- << " and its sub-registers?\n";
+ errs() << "Error: recursive sub-register relationship between"
+ << " register " << getQualifiedName(R)
+ << " and its sub-registers?\n";
abort();
}
public:
RegisterSorter(std::map<Record*, std::set<Record*>, LessRecord> &RS)
- : RegisterSubRegs(RS) {};
+ : RegisterSubRegs(RS) {}
bool operator()(Record *RegA, Record *RegB) {
// B is sub-register of A.
// RegisterInfoEmitter::run - Main register file description emitter.
//
-void RegisterInfoEmitter::run(std::ostream &OS) {
+void RegisterInfoEmitter::run(raw_ostream &OS) {
CodeGenTarget Target;
EmitSourceFileHeader("Register Information Source Fragment", OS);
// Emit the register list now.
OS << " // " << Name
<< " Register Class Value Types...\n"
- << " static const MVT " << Name
+ << " static const EVT " << Name
<< "[] = {\n ";
for (unsigned i = 0, e = RC.VTs.size(); i != e; ++i)
OS << getEnumName(RC.VTs[i]) << ", ";
OS << " // " << Name
<< " Sub-register Classes...\n"
<< " static const TargetRegisterClass* const "
- << Name << "SubRegClasses [] = {\n ";
+ << Name << "SubRegClasses[] = {\n ";
bool Empty = true;
OS << " // " << Name
<< " Super-register Classes...\n"
<< " static const TargetRegisterClass* const "
- << Name << "SuperRegClasses [] = {\n ";
+ << Name << "SuperRegClasses[] = {\n ";
bool Empty = true;
std::map<unsigned, std::set<unsigned> >::iterator I =
OS << " // " << Name
<< " Register Class sub-classes...\n"
<< " static const TargetRegisterClass* const "
- << Name << "Subclasses [] = {\n ";
+ << Name << "Subclasses[] = {\n ";
bool Empty = true;
for (unsigned rc2 = 0, e2 = RegisterClasses.size(); rc2 != e2; ++rc2) {
OS << " // " << Name
<< " Register Class super-classes...\n"
<< " static const TargetRegisterClass* const "
- << Name << "Superclasses [] = {\n ";
+ << Name << "Superclasses[] = {\n ";
bool Empty = true;
std::map<unsigned, std::set<unsigned> >::iterator I =
for (unsigned j = 0, e = LI.size(); j != e; ++j) {
Record *Reg = LI[j];
if (RegisterAliases[R].count(Reg))
- cerr << "Warning: register alias between " << getQualifiedName(R)
- << " and " << getQualifiedName(Reg)
- << " specified multiple times!\n";
+ errs() << "Warning: register alias between " << getQualifiedName(R)
+ << " and " << getQualifiedName(Reg)
+ << " specified multiple times!\n";
RegisterAliases[R].insert(Reg);
if (RegisterAliases[Reg].count(R))
- cerr << "Warning: register alias between " << getQualifiedName(R)
- << " and " << getQualifiedName(Reg)
- << " specified multiple times!\n";
+ errs() << "Warning: register alias between " << getQualifiedName(R)
+ << " and " << getQualifiedName(Reg)
+ << " specified multiple times!\n";
RegisterAliases[Reg].insert(R);
}
}
for (unsigned j = 0, e = LI.size(); j != e; ++j) {
Record *SubReg = LI[j];
if (RegisterSubRegs[R].count(SubReg))
- cerr << "Warning: register " << getQualifiedName(SubReg)
- << " specified as a sub-register of " << getQualifiedName(R)
- << " multiple times!\n";
+ errs() << "Warning: register " << getQualifiedName(SubReg)
+ << " specified as a sub-register of " << getQualifiedName(R)
+ << " multiple times!\n";
addSubSuperReg(R, SubReg, RegisterSubRegs, RegisterSuperRegs,
RegisterAliases);
}
}
OS<<"\n const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors\n";
- OS << " { \"NOREG\",\t\"NOREG\",\t0,\t0,\t0 },\n";
+ OS << " { \"NOREG\",\t0,\t0,\t0 },\n";
// Now that register alias and sub-registers sets have been emitted, emit the
// register descriptors now.
for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
const CodeGenRegister &Reg = Registers[i];
OS << " { \"";
- if (!Reg.TheDef->getValueAsString("AsmName").empty())
- OS << Reg.TheDef->getValueAsString("AsmName");
- else
- OS << Reg.getName();
- OS << "\",\t\"";
OS << Reg.getName() << "\",\t";
if (RegisterAliases.count(Reg.TheDef))
OS << Reg.getName() << "_AliasSet,\t";
std::vector<Record*> To = SubRegs[i]->getValueAsListOfDefs("To");
if (From.size() != To.size()) {
- cerr << "Error: register list and sub-register list not of equal length"
- << " in SubRegSet\n";
+ errs() << "Error: register list and sub-register list not of equal length"
+ << " in SubRegSet\n";
exit(1);
}
OS << " };\n";
OS << " return 0;\n";
OS << "}\n\n";
+
+ OS << "unsigned " << ClassName
+ << "::getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const {\n"
+ << " switch (RegNo) {\n"
+ << " default:\n return 0;\n";
+ for (std::map<Record*, std::vector<std::pair<int, Record*> > >::iterator
+ I = SubRegVectors.begin(), E = SubRegVectors.end(); I != E; ++I) {
+ OS << " case " << getQualifiedName(I->first) << ":\n";
+ for (unsigned i = 0, e = I->second.size(); i != e; ++i)
+ OS << " if (SubRegNo == "
+ << getQualifiedName((I->second)[i].second)
+ << ") return " << (I->second)[i].first << ";\n";
+ OS << " return 0;\n";
+ }
+ OS << " };\n";
+ OS << " return 0;\n";
+ OS << "}\n\n";
// Emit the constructor of the class...
OS << ClassName << "::" << ClassName
std::vector<int64_t> RegNums = Reg->getValueAsListOfInts("DwarfNumbers");
maxLength = std::max((size_t)maxLength, RegNums.size());
if (DwarfRegNums.count(Reg))
- cerr << "Warning: DWARF numbers for register " << getQualifiedName(Reg)
- << "specified multiple times\n";
+ errs() << "Warning: DWARF numbers for register " << getQualifiedName(Reg)
+ << "specified multiple times\n";
DwarfRegNums[Reg] = RegNums;
}
projects / oota-llvm.git / blobdiff