Move a few more warnings to use PrintWarning().

[oota-llvm.git] / utils / TableGen / RegisterInfoEmitter.cpp

diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index 8085955baf155454c2af25028f9a278a5c5fc1cb..748ffc534526da59fc6b80ac826267a33b85e6b6 100644 (file)
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -17,22 +17,23 @@
 #include "CodeGenTarget.h"
 #include "CodeGenRegisters.h"
 #include "SequenceToOffsetTable.h"
+#include "llvm/TableGen/Error.h"
 #include "llvm/TableGen/Record.h"
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/Twine.h"
 #include "llvm/Support/Format.h"
 #include <algorithm>
 #include <set>
 using namespace llvm;
 
 // runEnums - Print out enum values for all of the registers.
-void
-RegisterInfoEmitter::runEnums(raw_ostream &OS,
-                              CodeGenTarget &Target, CodeGenRegBank &Bank) {
+void RegisterInfoEmitter::runEnums(raw_ostream &OS,
+                                   CodeGenTarget &Target, CodeGenRegBank &Bank) {
   const std::vector<CodeGenRegister*> &Registers = Bank.getRegisters();
 
-  // Register enums are stored as uint16_t in the tables. Make sure we'll fit
+  // Register enums are stored as uint16_t in the tables. Make sure we'll fit.
   assert(Registers.size() <= 0xffff && "Too many regs to fit in tables");
 
   std::string Namespace = Registers[0]->TheDef->getValueAsString("Namespace");
@@ -125,19 +126,23 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
   unsigned NumSets = RegBank.getNumRegPressureSets();
 
   OS << "/// Get the weight in units of pressure for this register class.\n"
-     << "unsigned " << ClassName << "::\n"
+     << "const RegClassWeight &" << ClassName << "::\n"
      << "getRegClassWeight(const TargetRegisterClass *RC) const {\n"
-     << "  static const unsigned RCWeightTable[] = {\n";
+     << "  static const RegClassWeight RCWeightTable[] = {\n";
   for (unsigned i = 0, e = NumRCs; i != e; ++i) {
     const CodeGenRegisterClass &RC = *RegBank.getRegClasses()[i];
     const CodeGenRegister::Set &Regs = RC.getMembers();
     if (Regs.empty())
-      OS << "    0";
-    else
-      OS << "    " << (*Regs.begin())->getWeight(RegBank);
-    OS << ",  \t// " << RC.getName() << "\n";
+      OS << "    {0, 0";
+    else {
+      std::vector<unsigned> RegUnits;
+      RC.buildRegUnitSet(RegUnits);
+      OS << "    {" << (*Regs.begin())->getWeight(RegBank)
+         << ", " << RegBank.getRegUnitSetWeight(RegUnits);
+    }
+    OS << "},  \t// " << RC.getName() << "\n";
   }
-  OS << "    0 };\n"
+  OS << "    {0, 0} };\n"
      << "  return RCWeightTable[RC->getID()];\n"
      << "}\n\n";
 
@@ -153,12 +158,7 @@ EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank,
      << "  static const unsigned PressureLimitTable[] = {\n";
   for (unsigned i = 0; i < NumSets; ++i ) {
     const RegUnitSet &RegUnits = RegBank.getRegPressureSet(i);
-    unsigned Weight = 0;
-    for (RegUnitSet::iterator
-           I = RegUnits.Units.begin(), E = RegUnits.Units.end(); I != E; ++I) {
-      Weight += RegBank.getRegUnitWeight(*I);
-    }
-    OS << "    " << Weight
+    OS << "    " << RegBank.getRegUnitSetWeight(RegUnits.Units)
        << ",  \t// " << i << ": " << RegBank.getRegPressureSet(i).Name << "\n";
   }
   OS << "    0 };\n"
@@ -209,8 +209,8 @@ RegisterInfoEmitter::EmitRegMappingTables(raw_ostream &OS,
     std::vector<int64_t> RegNums = Reg->getValueAsListOfInts("DwarfNumbers");
     maxLength = std::max((size_t)maxLength, RegNums.size());
     if (DwarfRegNums.count(Reg))
-      errs() << "Warning: DWARF numbers for register " << getQualifiedName(Reg)
-             << "specified multiple times\n";
+      PrintWarning(Reg->getLoc(), Twine("DWARF numbers for register ") +
+                   getQualifiedName(Reg) + "specified multiple times\n");
     DwarfRegNums[Reg] = RegNums;
   }
 
@@ -668,7 +668,8 @@ RegisterInfoEmitter::runTargetHeader(raw_ostream &OS, CodeGenTarget &Target,
      << "  const TargetRegisterClass *getMatchingSuperRegClass("
         "const TargetRegisterClass*, const TargetRegisterClass*, "
         "unsigned) const;\n"
-     << "  unsigned getRegClassWeight(const TargetRegisterClass *RC) const;\n"
+     << "  const RegClassWeight &getRegClassWeight("
+     << "const TargetRegisterClass *RC) const;\n"
      << "  unsigned getNumRegPressureSets() const;\n"
      << "  unsigned getRegPressureSetLimit(unsigned Idx) const;\n"
      << "  const int *getRegClassPressureSets("