//===- InstrInfoEmitter.h - Generate a Instruction Set Desc. ----*- C++ -*-===//
-//
+//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
//===----------------------------------------------------------------------===//
//
// This tablegen backend is responsible for emitting a description of the target
#define INSTRINFO_EMITTER_H
#include "TableGenBackend.h"
+#include "CodeGenDAGPatterns.h"
+#include <vector>
+#include <map>
namespace llvm {
class InstrInfoEmitter : public TableGenBackend {
RecordKeeper &Records;
-public:
- InstrInfoEmitter(RecordKeeper &R) : Records(R) {}
+ CodeGenDAGPatterns CDP;
+ std::map<std::string, unsigned> ItinClassMap;
+public:
+ InstrInfoEmitter(RecordKeeper &R) : Records(R), CDP(R) { }
+
// run - Output the instruction set description, returning true on failure.
- void run(std::ostream &OS);
+ void run(raw_ostream &OS);
- // runEnums - Print out enum values for all of the instructions.
- void runEnums(std::ostream &OS);
private:
- void printDefList(ListInit *LI, const std::string &Name,
- std::ostream &OS) const;
+ typedef std::map<std::vector<std::string>, unsigned> OperandInfoMapTy;
+
void emitRecord(const CodeGenInstruction &Inst, unsigned Num,
- Record *InstrInfo, std::ostream &OS);
+ Record *InstrInfo,
+ std::map<std::vector<Record*>, unsigned> &EL,
+ std::map<Record*, unsigned> &BM,
+ const OperandInfoMapTy &OpInfo,
+ raw_ostream &OS);
void emitShiftedValue(Record *R, StringInit *Val, IntInit *Shift,
- std::ostream &OS);
+ raw_ostream &OS);
+
+ // Itinerary information.
+ void GatherItinClasses();
+ unsigned getItinClassNumber(const Record *InstRec);
+
+ // Operand information.
+ void EmitOperandInfo(raw_ostream &OS, OperandInfoMapTy &OperandInfoIDs);
+ std::vector<std::string> GetOperandInfo(const CodeGenInstruction &Inst);
+
+ void DetectRegisterClassBarriers(std::vector<Record*> &Defs,
+ const std::vector<CodeGenRegisterClass> &RCs,
+ std::vector<Record*> &Barriers);
};
} // End llvm namespace