#include "Record.h"
#include "X86DisassemblerTables.h"
#include "X86RecognizableInstr.h"
-#include "RISCDisassemblerEmitter.h"
+#include "ARMDecoderEmitter.h"
using namespace llvm;
using namespace llvm::X86Disassembler;
if (Target.getName() == "X86") {
DisassemblerTables Tables;
- std::vector<const CodeGenInstruction*> numberedInstructions;
- Target.getInstructionsByEnumValue(numberedInstructions);
+ const std::vector<const CodeGenInstruction*> &numberedInstructions =
+ Target.getInstructionsByEnumValue();
for (unsigned i = 0, e = numberedInstructions.size(); i != e; ++i)
RecognizableInstr::processInstr(Tables, *numberedInstructions[i], i);
// Fixed-instruction-length targets use a common disassembler.
if (Target.getName() == "ARM") {
- RISCDisassemblerEmitter(Records).run(OS);
+ ARMDecoderEmitter(Records).run(OS);
return;
}