#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Debug.h"
-#include "llvm/Support/Streams.h"
#include <algorithm>
#include <deque>
+#include <iostream>
using namespace llvm;
-namespace {
- cl::opt<bool>
- GenDebug("gen-debug", cl::desc("Generate debug code"),
- cl::init(false));
-}
+static cl::opt<bool>
+GenDebug("gen-debug", cl::desc("Generate debug code"), cl::init(false));
//===----------------------------------------------------------------------===//
// DAGISelEmitter Helper methods
/// patterns before small ones. This is used to determine the size of a
/// pattern.
static unsigned getPatternSize(TreePatternNode *P, CodeGenDAGPatterns &CGP) {
- assert((EMVT::isExtIntegerInVTs(P->getExtTypes()) ||
- EMVT::isExtFloatingPointInVTs(P->getExtTypes()) ||
+ assert((EEVT::isExtIntegerInVTs(P->getExtTypes()) ||
+ EEVT::isExtFloatingPointInVTs(P->getExtTypes()) ||
P->getExtTypeNum(0) == MVT::isVoid ||
P->getExtTypeNum(0) == MVT::Flag ||
P->getExtTypeNum(0) == MVT::iPTR ||
}
};
-/// getRegisterValueType - Look up and return the first ValueType of specified
-/// RegisterClass record
+/// getRegisterValueType - Look up and return the ValueType of the specified
+/// register. If the register is a member of multiple register classes which
+/// have different associated types, return MVT::Other.
static MVT::SimpleValueType getRegisterValueType(Record *R, const CodeGenTarget &T) {
- if (const CodeGenRegisterClass *RC = T.getRegisterClassForRegister(R))
- return RC->getValueTypeNum(0);
- return MVT::Other;
+ bool FoundRC = false;
+ MVT::SimpleValueType VT = MVT::Other;
+ const std::vector<CodeGenRegisterClass> &RCs = T.getRegisterClasses();
+ std::vector<CodeGenRegisterClass>::const_iterator RC;
+ std::vector<Record*>::const_iterator Element;
+
+ for (RC = RCs.begin() ; RC != RCs.end() ; RC++) {
+ Element = find((*RC).Elements.begin(), (*RC).Elements.end(), R);
+ if (Element != (*RC).Elements.end()) {
+ if (!FoundRC) {
+ FoundRC = true;
+ VT = (*RC).getValueTypeNum(0);
+ } else {
+ // In multiple RC's
+ if (VT != (*RC).getValueTypeNum(0)) {
+ // Types of the RC's do not agree. Return MVT::Other. The
+ // target is responsible for handling this.
+ return MVT::Other;
+ }
+ }
+ }
+ }
+ return VT;
}
//===----------------------------------------------------------------------===//
// Node Transformation emitter implementation.
//
-void DAGISelEmitter::EmitNodeTransforms(std::ostream &OS) {
+void DAGISelEmitter::EmitNodeTransforms(raw_ostream &OS) {
// Walk the pattern fragments, adding them to a map, which sorts them by
// name.
typedef std::map<std::string, CodeGenDAGPatterns::NodeXForm> NXsByNameTy;
// Predicate emitter implementation.
//
-void DAGISelEmitter::EmitPredicateFunctions(std::ostream &OS) {
+void DAGISelEmitter::EmitPredicateFunctions(raw_ostream &OS) {
OS << "\n// Predicate functions.\n";
// Walk the pattern fragments, adding them to a map, which sorts them by
NumInputRootOps = N->getNumChildren();
if (DisablePatternForFastISel(N, CGP))
- emitCheck("!Fast");
+ emitCheck("OptLevel != CodeGenOpt::None");
emitCheck(PredicateCheck);
}
std::string Fn = CP->getSelectFunc();
unsigned NumOps = CP->getNumOperands();
for (unsigned i = 0; i < NumOps; ++i) {
- emitDecl("CPTmp" + utostr(i));
- emitCode("SDValue CPTmp" + utostr(i) + ";");
+ emitDecl("CPTmp" + RootName + "_" + utostr(i));
+ emitCode("SDValue CPTmp" + RootName + "_" + utostr(i) + ";");
}
if (CP->hasProperty(SDNPHasChain)) {
emitDecl("CPInChain");
std::string Code = Fn + "(" + RootName + ", " + RootName;
for (unsigned i = 0; i < NumOps; i++)
- Code += ", CPTmp" + utostr(i);
+ Code += ", CPTmp" + RootName + "_" + utostr(i);
if (CP->hasProperty(SDNPHasChain)) {
ChainName = "Chain" + ChainSuffix;
Code += ", CPInChain, Chain" + ChainSuffix;
if (DefInit *DI = dynamic_cast<DefInit*>(Child->getLeafValue())) {
Record *LeafRec = DI->getDef();
if (LeafRec->isSubClassOf("RegisterClass") ||
- LeafRec->getName() == "ptr_rc") {
+ LeafRec->isSubClassOf("PointerLikeRegClass")) {
// Handle register references. Nothing to do here.
} else if (LeafRec->isSubClassOf("Register")) {
// Handle register references.
std::string Fn = CP->getSelectFunc();
unsigned NumOps = CP->getNumOperands();
for (unsigned i = 0; i < NumOps; ++i) {
- emitDecl("CPTmp" + utostr(i));
- emitCode("SDValue CPTmp" + utostr(i) + ";");
+ emitDecl("CPTmp" + RootName + "_" + utostr(i));
+ emitCode("SDValue CPTmp" + RootName + "_" + utostr(i) + ";");
}
if (CP->hasProperty(SDNPHasChain)) {
const SDNodeInfo &PInfo = CGP.getSDNodeInfo(Parent->getOperator());
}
Code += RootName;
for (unsigned i = 0; i < NumOps; i++)
- Code += ", CPTmp" + utostr(i);
+ Code += ", CPTmp" + RootName + "_" + utostr(i);
if (CP->hasProperty(SDNPHasChain))
Code += ", CPInChain, Chain" + ChainSuffix;
emitCheck(Code + ")");
} else {
#ifndef NDEBUG
Child->dump();
- cerr << " ";
+ errs() << " ";
#endif
assert(0 && "Unknown leaf type!");
}
std::string Val = VariableMap[VarName];
bool ModifiedVal = false;
if (Val.empty()) {
- cerr << "Variable '" << VarName << " referenced but not defined "
+ errs() << "Variable '" << VarName << " referenced but not defined "
<< "and not caught earlier!\n";
abort();
}
std::string TmpVar = "Tmp" + utostr(ResNo);
switch (N->getTypeNum(0)) {
default:
- cerr << "Cannot handle " << getEnumName(N->getTypeNum(0))
+ errs() << "Cannot handle " << getEnumName(N->getTypeNum(0))
<< " type as an immediate constant. Aborting\n";
abort();
case MVT::i1: CastType = "bool"; break;
NodeOps.push_back(Val);
} else if (N->isLeaf() && (CP = NodeGetComplexPattern(N, CGP))) {
for (unsigned i = 0; i < CP->getNumOperands(); ++i) {
- NodeOps.push_back("CPTmp" + utostr(i));
+ NodeOps.push_back("CPTmp" + Val + "_" + utostr(i));
}
} else {
// This node, probably wrapped in a SDNodeXForm, behaves like a leaf
getEnumName(N->getTypeNum(0)) + ");");
NodeOps.push_back("Tmp" + utostr(ResNo));
return NodeOps;
+ } else if (DI->getDef()->isSubClassOf("RegisterClass")) {
+ // Handle a reference to a register class. This is used
+ // in COPY_TO_SUBREG instructions.
+ emitCode("SDValue Tmp" + utostr(ResNo) +
+ " = CurDAG->getTargetConstant(" +
+ getQualifiedName(DI->getDef()) + "RegClassID, " +
+ "MVT::i32);");
+ NodeOps.push_back("Tmp" + utostr(ResNo));
+ return NodeOps;
}
} else if (IntInit *II = dynamic_cast<IntInit*>(N->getLeafValue())) {
unsigned ResNo = TmpNo++;
assert(N->getExtTypes().size() == 1 && "Multiple types not handled!");
emitCode("SDValue Tmp" + utostr(ResNo) +
- " = CurDAG->getTargetConstant(0x" + itohexstr(II->getValue()) +
+ " = CurDAG->getTargetConstant(0x" +
+ utohexstr((uint64_t) II->getValue()) +
"ULL, " + getEnumName(N->getTypeNum(0)) + ");");
NodeOps.push_back("Tmp" + utostr(ResNo));
return NodeOps;
TreePatternNode *InstPatNode =
isRoot ? (InstPat ? InstPat->getTree(0) : Pattern)
: (InstPat ? InstPat->getTree(0) : NULL);
- if (InstPatNode && InstPatNode->getOperator()->getName() == "set") {
+ if (InstPatNode && !InstPatNode->isLeaf() &&
+ InstPatNode->getOperator()->getName() == "set") {
InstPatNode = InstPatNode->getChild(InstPatNode->getNumChildren()-1);
}
bool IsVariadic = isRoot && II.isVariadic;
emitCode("}");
}
emitCode("InChains.push_back(" + ChainName + ");");
- emitCode(ChainName + " = CurDAG->getNode(ISD::TokenFactor, MVT::Other, "
+ emitCode(ChainName + " = CurDAG->getNode(ISD::TokenFactor, "
+ "N.getDebugLoc(), MVT::Other, "
"&InChains[0], InChains.size());");
if (GenDebug) {
emitCode("CurDAG->setSubgraphColor(" + ChainName +".getNode(), \"yellow\");");
std::string Code = "Opc" + utostr(OpcNo);
+ if (!isRoot || (InputHasChain && !NodeHasChain))
+ // For call to "getTargetNode()".
+ Code += ", N.getDebugLoc()";
+
emitOpcode(II.Namespace + "::" + II.TheDef->getName());
// Output order: results, chain, flags
}
N->dump();
- cerr << "\n";
+ errs() << "\n";
throw std::string("Unknown node in result pattern!");
}
}
std::string Decl = (!ResNodeDecled) ? "SDNode *" : "";
emitCode(Decl + "ResNode = CurDAG->getCopyToReg(" + ChainName +
+ ", " + RootName + ".getDebugLoc()" +
", " + getQualifiedName(RR) +
", " + RootName + utostr(OpNo) + ", InFlag).getNode();");
ResNodeDecled = true;
void DAGISelEmitter::EmitPatterns(std::vector<std::pair<const PatternToMatch*,
std::vector<std::pair<unsigned, std::string> > > >
&Patterns, unsigned Indent,
- std::ostream &OS) {
+ raw_ostream &OS) {
typedef std::pair<unsigned, std::string> CodeLine;
typedef std::vector<CodeLine> CodeList;
typedef std::vector<std::pair<const PatternToMatch*, CodeList> > PatternList;
// in this group share the same next line, emit it inline now. Do this
// until we run out of common predicates.
while (!ErasedPatterns && Patterns.back().second.back().first == 1) {
- // Check that all of fhe patterns in Patterns end with the same predicate.
+ // Check that all of the patterns in Patterns end with the same predicate.
bool AllEndWithSamePredicate = true;
for (unsigned i = 0, e = Patterns.size(); i != e; ++i)
if (Patterns[i].second.back() != Patterns.back().second.back()) {
return OpName;
}
-void DAGISelEmitter::EmitInstructionSelector(std::ostream &OS) {
+void DAGISelEmitter::EmitInstructionSelector(raw_ostream &OS) {
const CodeGenTarget &Target = CGP.getTargetInfo();
// Get the namespace to insert instructions into.
&Pattern);
}
} else {
- cerr << "Unrecognized opcode '";
+ errs() << "Unrecognized opcode '";
Node->dump();
- cerr << "' on tree pattern '";
- cerr << Pattern.getDstPattern()->getOperator()->getName() << "'!\n";
+ errs() << "' on tree pattern '";
+ errs() << Pattern.getDstPattern()->getOperator()->getName() << "'!\n";
exit(1);
}
}
CallerCode += ", " + TargetOpcodes[j];
}
for (unsigned j = 0, e = TargetVTs.size(); j != e; ++j) {
- CalleeCode += ", MVT VT" + utostr(j);
+ CalleeCode += ", MVT::SimpleValueType VT" + utostr(j);
CallerCode += ", " + TargetVTs[j];
}
for (std::set<std::string>::iterator
} else
OpVTI->second.push_back(OpVTStr);
- OS << "SDNode *Select_" << getLegalCName(OpName)
- << OpVTStr << "(const SDValue &N) {\n";
-
// We want to emit all of the matching code now. However, we want to emit
// the matches in order of minimal cost. Sort the patterns so the least
// cost one is at the start.
// If this pattern definitely matches, and if it isn't the last one, the
// patterns after it CANNOT ever match. Error out.
if (mightNotMatch == false && i != CodeForPatterns.size()-1) {
- cerr << "Pattern '";
- CodeForPatterns[i].first->getSrcPattern()->print(*cerr.stream());
- cerr << "' is impossible to select!\n";
+ errs() << "Pattern '";
+ CodeForPatterns[i].first->getSrcPattern()->print(errs());
+ errs() << "' is impossible to select!\n";
exit(1);
}
}
// Next, reverse the list of patterns itself for the same reason.
std::reverse(CodeForPatterns.begin(), CodeForPatterns.end());
+ OS << "SDNode *Select_" << getLegalCName(OpName)
+ << OpVTStr << "(const SDValue &N) {\n";
+
// Emit all of the patterns now, grouped together to share code.
EmitPatterns(CodeForPatterns, 2, OS);
<< " std::vector<SDValue> Ops(N.getNode()->op_begin(), N.getNode()->op_end());\n"
<< " SelectInlineAsmMemoryOperands(Ops);\n\n"
- << " std::vector<MVT> VTs;\n"
+ << " std::vector<EVT> VTs;\n"
<< " VTs.push_back(MVT::Other);\n"
<< " VTs.push_back(MVT::Flag);\n"
- << " SDValue New = CurDAG->getNode(ISD::INLINEASM, VTs, &Ops[0], "
- "Ops.size());\n"
+ << " SDValue New = CurDAG->getNode(ISD::INLINEASM, N.getDebugLoc(), "
+ "VTs, &Ops[0], Ops.size());\n"
<< " return New.getNode();\n"
<< "}\n\n";
<< " MVT::Other, Tmp, Chain);\n"
<< "}\n\n";
- OS << "SDNode *Select_DECLARE(const SDValue &N) {\n"
- << " SDValue Chain = N.getOperand(0);\n"
- << " SDValue N1 = N.getOperand(1);\n"
- << " SDValue N2 = N.getOperand(2);\n"
- << " if (!isa<FrameIndexSDNode>(N1) || !isa<GlobalAddressSDNode>(N2)) {\n"
- << " CannotYetSelect(N);\n"
- << " }\n"
- << " int FI = cast<FrameIndexSDNode>(N1)->getIndex();\n"
- << " GlobalValue *GV = cast<GlobalAddressSDNode>(N2)->getGlobal();\n"
- << " SDValue Tmp1 = "
- << "CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy());\n"
- << " SDValue Tmp2 = "
- << "CurDAG->getTargetGlobalAddress(GV, TLI.getPointerTy());\n"
- << " return CurDAG->SelectNodeTo(N.getNode(), TargetInstrInfo::DECLARE,\n"
- << " MVT::Other, Tmp1, Tmp2, Chain);\n"
- << "}\n\n";
-
- OS << "SDNode *Select_EXTRACT_SUBREG(const SDValue &N) {\n"
- << " SDValue N0 = N.getOperand(0);\n"
- << " SDValue N1 = N.getOperand(1);\n"
- << " unsigned C = cast<ConstantSDNode>(N1)->getZExtValue();\n"
- << " SDValue Tmp = CurDAG->getTargetConstant(C, MVT::i32);\n"
- << " return CurDAG->SelectNodeTo(N.getNode(), TargetInstrInfo::EXTRACT_SUBREG,\n"
- << " N.getValueType(), N0, Tmp);\n"
- << "}\n\n";
-
- OS << "SDNode *Select_INSERT_SUBREG(const SDValue &N) {\n"
- << " SDValue N0 = N.getOperand(0);\n"
- << " SDValue N1 = N.getOperand(1);\n"
- << " SDValue N2 = N.getOperand(2);\n"
- << " unsigned C = cast<ConstantSDNode>(N2)->getZExtValue();\n"
- << " SDValue Tmp = CurDAG->getTargetConstant(C, MVT::i32);\n"
- << " return CurDAG->SelectNodeTo(N.getNode(), TargetInstrInfo::INSERT_SUBREG,\n"
- << " N.getValueType(), N0, N1, Tmp);\n"
- << "}\n\n";
-
OS << "// The main instruction selector code.\n"
<< "SDNode *SelectCode(SDValue N) {\n"
- << " MVT::SimpleValueType NVT = N.getNode()->getValueType(0).getSimpleVT();\n"
+ << " MVT::SimpleValueType NVT = N.getNode()->getValueType(0).getSimpleVT().SimpleTy;\n"
<< " switch (N.getOpcode()) {\n"
<< " default:\n"
<< " assert(!N.isMachineOpcode() && \"Node already selected!\");\n"
<< " case ISD::INLINEASM: return Select_INLINEASM(N);\n"
<< " case ISD::DBG_LABEL: return Select_DBG_LABEL(N);\n"
<< " case ISD::EH_LABEL: return Select_EH_LABEL(N);\n"
- << " case ISD::DECLARE: return Select_DECLARE(N);\n"
- << " case ISD::EXTRACT_SUBREG: return Select_EXTRACT_SUBREG(N);\n"
- << " case ISD::INSERT_SUBREG: return Select_INSERT_SUBREG(N);\n"
<< " case ISD::UNDEF: return Select_UNDEF(N);\n";
// Loop over all of the case statements, emiting a call to each method we
OpcodeVTMap.find(OpName);
std::vector<std::string> &OpVTs = OpVTI->second;
OS << " case " << OpName << ": {\n";
+ // If we have only one variant and it's the default, elide the
+ // switch. Marginally faster, and makes MSVC happier.
+ if (OpVTs.size()==1 && OpVTs[0].empty()) {
+ OS << " return Select_" << getLegalCName(OpName) << "(N);\n";
+ OS << " break;\n";
+ OS << " }\n";
+ continue;
+ }
// Keep track of whether we see a pattern that has an iPtr result.
bool HasPtrPattern = false;
bool HasDefaultPattern = false;
<< "}\n\n";
OS << "void CannotYetSelect(SDValue N) DISABLE_INLINE {\n"
- << " cerr << \"Cannot yet select: \";\n"
- << " N.getNode()->dump(CurDAG);\n"
- << " cerr << '\\n';\n"
- << " abort();\n"
+ << " std::string msg;\n"
+ << " raw_string_ostream Msg(msg);\n"
+ << " Msg << \"Cannot yet select: \";\n"
+ << " N.getNode()->print(Msg, CurDAG);\n"
+ << " llvm_report_error(Msg.str());\n"
<< "}\n\n";
OS << "void CannotYetSelectIntrinsic(SDValue N) DISABLE_INLINE {\n"
- << " cerr << \"Cannot yet select: \";\n"
+ << " errs() << \"Cannot yet select: \";\n"
<< " unsigned iid = cast<ConstantSDNode>(N.getOperand("
<< "N.getOperand(0).getValueType() == MVT::Other))->getZExtValue();\n"
- << " cerr << \"intrinsic %\"<< "
- << "Intrinsic::getName((Intrinsic::ID)iid);\n"
- << " cerr << '\\n';\n"
- << " abort();\n"
+ << " llvm_report_error(\"Cannot yet select: intrinsic %\" +\n"
+ << "Intrinsic::getName((Intrinsic::ID)iid));\n"
<< "}\n\n";
}
-void DAGISelEmitter::run(std::ostream &OS) {
+void DAGISelEmitter::run(raw_ostream &OS) {
EmitSourceFileHeader("DAG Instruction Selector for the " +
CGP.getTargetInfo().getName() + " target", OS);
OS << "// Include standard, target-independent definitions and methods used\n"
<< "// by the instruction selector.\n";
- OS << "#include <llvm/CodeGen/DAGISelHeader.h>\n\n";
+ OS << "#include \"llvm/CodeGen/DAGISelHeader.h\"\n\n";
EmitNodeTransforms(OS);
EmitPredicateFunctions(OS);
- DOUT << "\n\nALL PATTERNS TO MATCH:\n\n";
+ DEBUG(errs() << "\n\nALL PATTERNS TO MATCH:\n\n");
for (CodeGenDAGPatterns::ptm_iterator I = CGP.ptm_begin(), E = CGP.ptm_end();
I != E; ++I) {
- DOUT << "PATTERN: "; DEBUG(I->getSrcPattern()->dump());
- DOUT << "\nRESULT: "; DEBUG(I->getDstPattern()->dump());
- DOUT << "\n";
+ DEBUG(errs() << "PATTERN: "; I->getSrcPattern()->dump());
+ DEBUG(errs() << "\nRESULT: "; I->getDstPattern()->dump());
+ DEBUG(errs() << "\n");
}
// At this point, we have full information about the 'Patterns' we need to
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