//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
#ifndef CODEGEN_TARGET_H
#define CODEGEN_TARGET_H
+#include "llvm/Support/raw_ostream.h"
#include "CodeGenRegisters.h"
#include "CodeGenInstruction.h"
-#include <iosfwd>
+#include <algorithm>
#include <map>
namespace llvm {
class Record;
class RecordKeeper;
struct CodeGenRegister;
+class CodeGenTarget;
+
+// SelectionDAG node properties.
+// SDNPMemOperand: indicates that a node touches memory and therefore must
+// have an associated memory operand that describes the access.
+enum SDNP {
+ SDNPCommutative,
+ SDNPAssociative,
+ SDNPHasChain,
+ SDNPOutFlag,
+ SDNPInFlag,
+ SDNPOptInFlag,
+ SDNPMayLoad,
+ SDNPMayStore,
+ SDNPSideEffect,
+ SDNPMemOperand
+};
-/// getValueType - Return the MVT::ValueType that the specified TableGen record
-/// corresponds to.
-MVT::ValueType getValueType(Record *Rec);
+// ComplexPattern attributes.
+enum CPAttr { CPAttrParentAsRoot };
-std::ostream &operator<<(std::ostream &OS, MVT::ValueType T);
-std::string getName(MVT::ValueType T);
-std::string getEnumName(MVT::ValueType T);
+/// getValueType - Return the MVT::SimpleValueType that the specified TableGen
+/// record corresponds to.
+MVT::SimpleValueType getValueType(Record *Rec);
+std::string getName(MVT::SimpleValueType T);
+std::string getEnumName(MVT::SimpleValueType T);
+/// getQualifiedName - Return the name of the specified record, with a
+/// namespace qualifier if the record contains one.
+std::string getQualifiedName(const Record *R);
+
/// CodeGenTarget - This class corresponds to the Target class in the .td files.
///
class CodeGenTarget {
Record *TargetRec;
- std::vector<Record*> CalleeSavedRegisters;
- MVT::ValueType PointerType;
mutable std::map<std::string, CodeGenInstruction> Instructions;
mutable std::vector<CodeGenRegister> Registers;
mutable std::vector<CodeGenRegisterClass> RegisterClasses;
- mutable std::vector<MVT::ValueType> LegalValueTypes;
+ mutable std::vector<MVT::SimpleValueType> LegalValueTypes;
void ReadRegisters() const;
void ReadRegisterClasses() const;
void ReadInstructions() const;
Record *getTargetRecord() const { return TargetRec; }
const std::string &getName() const;
- const std::vector<Record*> &getCalleeSavedRegisters() const {
- return CalleeSavedRegisters;
- }
-
- MVT::ValueType getPointerType() const { return PointerType; }
+ /// getInstNamespace - Return the target-specific instruction namespace.
+ ///
+ std::string getInstNamespace() const;
/// getInstructionSet - Return the InstructionSet object.
///
Record *getInstructionSet() const;
+ /// getAsmParser - Return the AssemblyParser definition for this target.
+ ///
+ Record *getAsmParser() const;
+
/// getAsmWriter - Return the AssemblyWriter definition for this target.
///
Record *getAsmWriter() const;
}
/// getRegisterClassForRegister - Find the register class that contains the
- /// specified physical register. If there register exists in multiple
- /// register classes or is not in a register class, return null.
+ /// specified physical register. If the register is not in a register
+ /// class, return null. If the register is in multiple classes, and the
+ /// classes have a superset-subset relationship and the same set of
+ /// types, return the superclass. Otherwise return null.
const CodeGenRegisterClass *getRegisterClassForRegister(Record *R) const {
const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
const CodeGenRegisterClass *FoundRC = 0;
for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
const CodeGenRegisterClass &RC = RegisterClasses[i];
for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
- if (R == RC.Elements[ei]) {
- if (FoundRC) return 0; // In multiple RC's
+ if (R != RC.Elements[ei])
+ continue;
+
+ // If a register's classes have different types, return null.
+ if (FoundRC && RC.getValueTypes() != FoundRC->getValueTypes())
+ return 0;
+
+ // If this is the first class that contains the register,
+ // make a note of it and go on to the next class.
+ if (!FoundRC) {
FoundRC = &RC;
break;
}
+
+ std::vector<Record *> Elements(RC.Elements);
+ std::vector<Record *> FoundElements(FoundRC->Elements);
+ std::sort(Elements.begin(), Elements.end());
+ std::sort(FoundElements.begin(), FoundElements.end());
+
+ // Check to see if the previously found class that contains
+ // the register is a subclass of the current class. If so,
+ // prefer the superclass.
+ if (std::includes(Elements.begin(), Elements.end(),
+ FoundElements.begin(), FoundElements.end())) {
+ FoundRC = &RC;
+ break;
+ }
+
+ // Check to see if the previously found class that contains
+ // the register is a superclass of the current class. If so,
+ // prefer the superclass.
+ if (std::includes(FoundElements.begin(), FoundElements.end(),
+ Elements.begin(), Elements.end()))
+ break;
+
+ // Multiple classes, and neither is a superclass of the other.
+ // Return null.
+ return 0;
}
}
return FoundRC;
}
+
+ /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
+ /// specified physical register.
+ std::vector<unsigned char> getRegisterVTs(Record *R) const;
- const std::vector<MVT::ValueType> &getLegalValueTypes() const {
+ const std::vector<MVT::SimpleValueType> &getLegalValueTypes() const {
if (LegalValueTypes.empty()) ReadLegalValueTypes();
return LegalValueTypes;
}
/// isLegalValueType - Return true if the specified value type is natively
/// supported by the target (i.e. there are registers that directly hold it).
- bool isLegalValueType(MVT::ValueType VT) const {
- const std::vector<MVT::ValueType> &LegalVTs = getLegalValueTypes();
+ bool isLegalValueType(MVT::SimpleValueType VT) const {
+ const std::vector<MVT::SimpleValueType> &LegalVTs = getLegalValueTypes();
for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
if (LegalVTs[i] == VT) return true;
return false;
if (Instructions.empty()) ReadInstructions();
return Instructions;
}
+ std::map<std::string, CodeGenInstruction> &getInstructions() {
+ if (Instructions.empty()) ReadInstructions();
+ return Instructions;
+ }
CodeGenInstruction &getInstruction(const std::string &Name) const {
const std::map<std::string, CodeGenInstruction> &Insts = getInstructions();
/// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
/// tablegen class in TargetSelectionDAG.td
class ComplexPattern {
- MVT::ValueType Ty;
+ MVT::SimpleValueType Ty;
unsigned NumOperands;
std::string SelectFunc;
std::vector<Record*> RootNodes;
+ unsigned Properties; // Node properties
+ unsigned Attributes; // Pattern attributes
public:
ComplexPattern() : NumOperands(0) {};
ComplexPattern(Record *R);
- MVT::ValueType getValueType() const { return Ty; }
+ MVT::SimpleValueType getValueType() const { return Ty; }
unsigned getNumOperands() const { return NumOperands; }
const std::string &getSelectFunc() const { return SelectFunc; }
const std::vector<Record*> &getRootNodes() const {
return RootNodes;
}
+ bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
+ bool hasAttribute(enum CPAttr Attr) const { return Attributes & (1 << Attr); }
};
} // End llvm namespace
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