#ifndef CODEGEN_TARGET_H
#define CODEGEN_TARGET_H
+#include "llvm/Support/raw_ostream.h"
#include "CodeGenRegisters.h"
#include "CodeGenInstruction.h"
-#include <iosfwd>
+#include <algorithm>
#include <map>
namespace llvm {
class CodeGenTarget;
// SelectionDAG node properties.
+// SDNPMemOperand: indicates that a node touches memory and therefore must
+// have an associated memory operand that describes the access.
enum SDNP {
SDNPCommutative,
SDNPAssociative,
SDNPOptInFlag,
SDNPMayLoad,
SDNPMayStore,
- SDNPSideEffect
+ SDNPSideEffect,
+ SDNPMemOperand
};
-// ComplexPattern attributes.
-enum CPAttr { CPAttrParentAsRoot };
-
/// getValueType - Return the MVT::SimpleValueType that the specified TableGen
/// record corresponds to.
MVT::SimpleValueType getValueType(Record *Rec);
void ReadRegisterClasses() const;
void ReadInstructions() const;
void ReadLegalValueTypes() const;
+
+ std::vector<const CodeGenInstruction*> InstrsByEnum;
public:
CodeGenTarget();
Record *getTargetRecord() const { return TargetRec; }
const std::string &getName() const;
+ /// getInstNamespace - Return the target-specific instruction namespace.
+ ///
+ std::string getInstNamespace() const;
+
/// getInstructionSet - Return the InstructionSet object.
///
Record *getInstructionSet() const;
+ /// getAsmParser - Return the AssemblyParser definition for this target.
+ ///
+ Record *getAsmParser() const;
+
/// getAsmWriter - Return the AssemblyWriter definition for this target.
///
Record *getAsmWriter() const;
}
/// getRegisterClassForRegister - Find the register class that contains the
- /// specified physical register. If there register exists in multiple
- /// register classes or is not in a register class, return null.
+ /// specified physical register. If the register is not in a register
+ /// class, return null. If the register is in multiple classes, and the
+ /// classes have a superset-subset relationship and the same set of
+ /// types, return the superclass. Otherwise return null.
const CodeGenRegisterClass *getRegisterClassForRegister(Record *R) const {
const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
const CodeGenRegisterClass *FoundRC = 0;
for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
const CodeGenRegisterClass &RC = RegisterClasses[i];
for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
- if (R == RC.Elements[ei]) {
- if (FoundRC) return 0; // In multiple RC's
+ if (R != RC.Elements[ei])
+ continue;
+
+ // If a register's classes have different types, return null.
+ if (FoundRC && RC.getValueTypes() != FoundRC->getValueTypes())
+ return 0;
+
+ // If this is the first class that contains the register,
+ // make a note of it and go on to the next class.
+ if (!FoundRC) {
FoundRC = &RC;
break;
}
+
+ std::vector<Record *> Elements(RC.Elements);
+ std::vector<Record *> FoundElements(FoundRC->Elements);
+ std::sort(Elements.begin(), Elements.end());
+ std::sort(FoundElements.begin(), FoundElements.end());
+
+ // Check to see if the previously found class that contains
+ // the register is a subclass of the current class. If so,
+ // prefer the superclass.
+ if (std::includes(Elements.begin(), Elements.end(),
+ FoundElements.begin(), FoundElements.end())) {
+ FoundRC = &RC;
+ break;
+ }
+
+ // Check to see if the previously found class that contains
+ // the register is a superclass of the current class. If so,
+ // prefer the superclass.
+ if (std::includes(FoundElements.begin(), FoundElements.end(),
+ Elements.begin(), Elements.end()))
+ break;
+
+ // Multiple classes, and neither is a superclass of the other.
+ // Return null.
+ return 0;
}
}
return FoundRC;
/// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
/// specified physical register.
- std::vector<unsigned char> getRegisterVTs(Record *R) const;
+ std::vector<MVT::SimpleValueType> getRegisterVTs(Record *R) const;
const std::vector<MVT::SimpleValueType> &getLegalValueTypes() const {
if (LegalValueTypes.empty()) ReadLegalValueTypes();
/// getInstructions - Return all of the instructions defined for this target.
///
+private:
const std::map<std::string, CodeGenInstruction> &getInstructions() const {
if (Instructions.empty()) ReadInstructions();
return Instructions;
if (Instructions.empty()) ReadInstructions();
return Instructions;
}
-
CodeGenInstruction &getInstruction(const std::string &Name) const {
const std::map<std::string, CodeGenInstruction> &Insts = getInstructions();
assert(Insts.count(Name) && "Not an instruction!");
return const_cast<CodeGenInstruction&>(Insts.find(Name)->second);
}
+public:
+
+ CodeGenInstruction &getInstruction(const Record *InstRec) const;
typedef std::map<std::string,
CodeGenInstruction>::const_iterator inst_iterator;
/// getInstructionsByEnumValue - Return all of the instructions defined by the
/// target, ordered by their enum value.
- void getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
- &NumberedInstructions);
+ const std::vector<const CodeGenInstruction*> &getInstructionsByEnumValue() {
+ if (InstrsByEnum.empty()) ComputeInstrsByEnum();
+ return InstrsByEnum;
+ }
/// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]?
///
bool isLittleEndianEncoding() const;
+
+private:
+ void ComputeInstrsByEnum();
};
/// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
std::string SelectFunc;
std::vector<Record*> RootNodes;
unsigned Properties; // Node properties
- unsigned Attributes; // Pattern attributes
public:
- ComplexPattern() : NumOperands(0) {};
+ ComplexPattern() : NumOperands(0) {}
ComplexPattern(Record *R);
MVT::SimpleValueType getValueType() const { return Ty; }
return RootNodes;
}
bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
- bool hasAttribute(enum CPAttr Attr) const { return Attributes & (1 << Attr); }
};
} // End llvm namespace
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