-//===- CodeGenTarget.cpp - CodeGen Target Class Wrapper ---------*- C++ -*-===//
+//===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
-// This class wrap target description classes used by the various code
+// This class wraps target description classes used by the various code
// generation TableGen backends. This makes it easier to access the data and
// provides a single place that needs to check it for validity. All of these
// classes throw exceptions on error conditions.
#include "Record.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/CommandLine.h"
-#include <set>
+#include "llvm/Support/Streams.h"
#include <algorithm>
using namespace llvm;
/// getValueType - Return the MCV::ValueType that the specified TableGen record
/// corresponds to.
-MVT::ValueType llvm::getValueType(Record *Rec, const CodeGenTarget *CGT) {
+MVT::ValueType llvm::getValueType(Record *Rec) {
return (MVT::ValueType)Rec->getValueAsInt("Value");
}
case MVT::i32: return "MVT::i32";
case MVT::i64: return "MVT::i64";
case MVT::i128: return "MVT::i128";
+ case MVT::iAny: return "MVT::iAny";
+ case MVT::fAny: return "MVT::fAny";
case MVT::f32: return "MVT::f32";
case MVT::f64: return "MVT::f64";
case MVT::f80: return "MVT::f80";
case MVT::f128: return "MVT::f128";
+ case MVT::ppcf128: return "MVT::ppcf128";
case MVT::Flag: return "MVT::Flag";
case MVT::isVoid:return "MVT::void";
case MVT::v8i8: return "MVT::v8i8";
case MVT::v4i16: return "MVT::v4i16";
case MVT::v2i32: return "MVT::v2i32";
+ case MVT::v1i64: return "MVT::v1i64";
case MVT::v16i8: return "MVT::v16i8";
case MVT::v8i16: return "MVT::v8i16";
case MVT::v4i32: return "MVT::v4i32";
case MVT::v2f32: return "MVT::v2f32";
case MVT::v4f32: return "MVT::v4f32";
case MVT::v2f64: return "MVT::v2f64";
+ case MVT::v3i32: return "MVT::v3i32";
+ case MVT::v3f32: return "MVT::v3f32";
case MVT::iPTR: return "TLI.getPointerTy()";
default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
}
case MVT::i32: return "MVT::i32";
case MVT::i64: return "MVT::i64";
case MVT::i128: return "MVT::i128";
+ case MVT::iAny: return "MVT::iAny";
+ case MVT::fAny: return "MVT::fAny";
case MVT::f32: return "MVT::f32";
case MVT::f64: return "MVT::f64";
case MVT::f80: return "MVT::f80";
case MVT::f128: return "MVT::f128";
+ case MVT::ppcf128: return "MVT::ppcf128";
case MVT::Flag: return "MVT::Flag";
case MVT::isVoid:return "MVT::isVoid";
case MVT::v8i8: return "MVT::v8i8";
case MVT::v4i16: return "MVT::v4i16";
case MVT::v2i32: return "MVT::v2i32";
+ case MVT::v1i64: return "MVT::v1i64";
case MVT::v16i8: return "MVT::v16i8";
case MVT::v8i16: return "MVT::v8i16";
case MVT::v4i32: return "MVT::v4i32";
case MVT::v2f32: return "MVT::v2f32";
case MVT::v4f32: return "MVT::v4f32";
case MVT::v2f64: return "MVT::v2f64";
- case MVT::iPTR: return "TLI.getPointerTy()";
+ case MVT::v3i32: return "MVT::v3i32";
+ case MVT::v3f32: return "MVT::v3f32";
+ case MVT::iPTR: return "MVT::iPTR";
default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
}
}
-
-std::ostream &llvm::operator<<(std::ostream &OS, MVT::ValueType T) {
- return OS << getName(T);
+/// getQualifiedName - Return the name of the specified record, with a
+/// namespace qualifier if the record contains one.
+///
+std::string llvm::getQualifiedName(const Record *R) {
+ std::string Namespace = R->getValueAsString("Namespace");
+ if (Namespace.empty()) return R->getName();
+ return Namespace + "::" + R->getName();
}
+
+
/// getTarget - Return the current instance of the Target class.
///
CodeGenTarget::CodeGenTarget() {
Elements.push_back(Reg);
}
+ std::vector<Record*> SubRegClassList =
+ R->getValueAsListOfDefs("SubRegClassList");
+ for (unsigned i = 0, e = SubRegClassList.size(); i != e; ++i) {
+ Record *SubRegClass = SubRegClassList[i];
+ if (!SubRegClass->isSubClassOf("RegisterClass"))
+ throw "Register Class member '" + SubRegClass->getName() +
+ "' does not derive from the RegisterClass class!";
+ SubRegClasses.push_back(SubRegClass);
+ }
+
// Allow targets to override the size in bits of the RegisterClass.
unsigned Size = R->getValueAsInt("Size");
Namespace = R->getValueAsString("Namespace");
SpillSize = Size ? Size : MVT::getSizeInBits(VTs[0]);
SpillAlignment = R->getValueAsInt("Alignment");
+ CopyCost = R->getValueAsInt("CopyCost");
MethodBodies = R->getValueAsCode("MethodBodies");
MethodProtos = R->getValueAsCode("MethodProtos");
}
if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!";
const CodeGenInstruction *INLINEASM = &I->second;
+ I = getInstructions().find("LABEL");
+ if (I == Instructions.end()) throw "Could not find 'LABEL' instruction!";
+ const CodeGenInstruction *LABEL = &I->second;
+
+ I = getInstructions().find("DECLARE");
+ if (I == Instructions.end()) throw "Could not find 'DECLARE' instruction!";
+ const CodeGenInstruction *DECLARE = &I->second;
+
+ I = getInstructions().find("EXTRACT_SUBREG");
+ if (I == Instructions.end())
+ throw "Could not find 'EXTRACT_SUBREG' instruction!";
+ const CodeGenInstruction *EXTRACT_SUBREG = &I->second;
+
+ I = getInstructions().find("INSERT_SUBREG");
+ if (I == Instructions.end())
+ throw "Could not find 'INSERT_SUBREG' instruction!";
+ const CodeGenInstruction *INSERT_SUBREG = &I->second;
+
// Print out the rest of the instructions now.
NumberedInstructions.push_back(PHI);
NumberedInstructions.push_back(INLINEASM);
+ NumberedInstructions.push_back(LABEL);
+ NumberedInstructions.push_back(DECLARE);
+ NumberedInstructions.push_back(EXTRACT_SUBREG);
+ NumberedInstructions.push_back(INSERT_SUBREG);
for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
- if (&II->second != PHI &&&II->second != INLINEASM)
+ if (&II->second != PHI &&
+ &II->second != INLINEASM &&
+ &II->second != LABEL &&
+ &II->second != DECLARE &&
+ &II->second != EXTRACT_SUBREG &&
+ &II->second != INSERT_SUBREG)
NumberedInstructions.push_back(&II->second);
}
return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
}
-CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
- : TheDef(R), AsmString(AsmStr) {
- Name = R->getValueAsString("Name");
- Namespace = R->getValueAsString("Namespace");
-
- isReturn = R->getValueAsBit("isReturn");
- isBranch = R->getValueAsBit("isBranch");
- isBarrier = R->getValueAsBit("isBarrier");
- isCall = R->getValueAsBit("isCall");
- isLoad = R->getValueAsBit("isLoad");
- isStore = R->getValueAsBit("isStore");
- isTwoAddress = R->getValueAsBit("isTwoAddress");
- isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress");
- isCommutable = R->getValueAsBit("isCommutable");
- isTerminator = R->getValueAsBit("isTerminator");
- hasDelaySlot = R->getValueAsBit("hasDelaySlot");
- usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter");
- hasCtrlDep = R->getValueAsBit("hasCtrlDep");
- noResults = R->getValueAsBit("noResults");
- hasVariableNumberOfOperands = false;
-
- DagInit *DI;
- try {
- DI = R->getValueAsDag("OperandList");
- } catch (...) {
- // Error getting operand list, just ignore it (sparcv9).
- AsmString.clear();
- OperandList.clear();
- return;
- }
-
- unsigned MIOperandNo = 0;
- std::set<std::string> OperandNames;
- for (unsigned i = 0, e = DI->getNumArgs(); i != e; ++i) {
- DefInit *Arg = dynamic_cast<DefInit*>(DI->getArg(i));
- if (!Arg)
- throw "Illegal operand for the '" + R->getName() + "' instruction!";
-
- Record *Rec = Arg->getDef();
- std::string PrintMethod = "printOperand";
- unsigned NumOps = 1;
- DagInit *MIOpInfo = 0;
- if (Rec->isSubClassOf("Operand")) {
- PrintMethod = Rec->getValueAsString("PrintMethod");
- NumOps = Rec->getValueAsInt("NumMIOperands");
- MIOpInfo = Rec->getValueAsDag("MIOperandInfo");
- } else if (Rec->getName() == "variable_ops") {
- hasVariableNumberOfOperands = true;
- continue;
- } else if (!Rec->isSubClassOf("RegisterClass"))
- throw "Unknown operand class '" + Rec->getName() +
- "' in instruction '" + R->getName() + "' instruction!";
-
- // Check that the operand has a name and that it's unique.
- if (DI->getArgName(i).empty())
- throw "In instruction '" + R->getName() + "', operand #" + utostr(i) +
- " has no name!";
- if (!OperandNames.insert(DI->getArgName(i)).second)
- throw "In instruction '" + R->getName() + "', operand #" + utostr(i) +
- " has the same name as a previous operand!";
-
- OperandList.push_back(OperandInfo(Rec, DI->getArgName(i), PrintMethod,
- MIOperandNo, NumOps, MIOpInfo));
- MIOperandNo += NumOps;
- }
-}
-
-
-
-/// getOperandNamed - Return the index of the operand with the specified
-/// non-empty name. If the instruction does not have an operand with the
-/// specified name, throw an exception.
-///
-unsigned CodeGenInstruction::getOperandNamed(const std::string &Name) const {
- assert(!Name.empty() && "Cannot search for operand with no name!");
- for (unsigned i = 0, e = OperandList.size(); i != e; ++i)
- if (OperandList[i].Name == Name) return i;
- throw "Instruction '" + TheDef->getName() +
- "' does not have an operand named '$" + Name + "'!";
-}
-
//===----------------------------------------------------------------------===//
// ComplexPattern implementation
//
NumOperands = R->getValueAsInt("NumOperands");
SelectFunc = R->getValueAsString("SelectFunc");
RootNodes = R->getValueAsListOfDefs("RootNodes");
+
+ // Parse the properties.
+ Properties = 0;
+ std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
+ for (unsigned i = 0, e = PropList.size(); i != e; ++i)
+ if (PropList[i]->getName() == "SDNPHasChain") {
+ Properties |= 1 << SDNPHasChain;
+ } else if (PropList[i]->getName() == "SDNPOptInFlag") {
+ Properties |= 1 << SDNPOptInFlag;
+ } else if (PropList[i]->getName() == "SDNPMayStore") {
+ Properties |= 1 << SDNPMayStore;
+ } else if (PropList[i]->getName() == "SDNPMayLoad") {
+ Properties |= 1 << SDNPMayLoad;
+ } else if (PropList[i]->getName() == "SDNPSideEffect") {
+ Properties |= 1 << SDNPSideEffect;
+ } else {
+ cerr << "Unsupported SD Node property '" << PropList[i]->getName()
+ << "' on ComplexPattern '" << R->getName() << "'!\n";
+ exit(1);
+ }
+
+ // Parse the attributes.
+ Attributes = 0;
+ PropList = R->getValueAsListOfDefs("Attributes");
+ for (unsigned i = 0, e = PropList.size(); i != e; ++i)
+ if (PropList[i]->getName() == "CPAttrParentAsRoot") {
+ Attributes |= 1 << CPAttrParentAsRoot;
+ } else {
+ cerr << "Unsupported pattern attribute '" << PropList[i]->getName()
+ << "' on ComplexPattern '" << R->getName() << "'!\n";
+ exit(1);
+ }
}
//===----------------------------------------------------------------------===//
TheDef = R;
std::string DefName = R->getName();
ModRef = WriteMem;
+ isOverloaded = false;
if (DefName.size() <= 4 ||
std::string(DefName.begin(), DefName.begin()+4) != "int_")
// Parse the list of argument types.
ListInit *TypeList = R->getValueAsListInit("Types");
for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
- DefInit *DI = dynamic_cast<DefInit*>(TypeList->getElement(i));
- assert(DI && "Invalid list type!");
- Record *TyEl = DI->getDef();
+ Record *TyEl = TypeList->getElementAsRecord(i);
assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
- ArgTypes.push_back(TyEl->getValueAsString("TypeVal"));
-
- if (CGT)
- ArgVTs.push_back(getValueType(TyEl->getValueAsDef("VT"), CGT));
+ MVT::ValueType VT = getValueType(TyEl->getValueAsDef("VT"));
+ isOverloaded |= VT == MVT::iAny || VT == MVT::fAny;
+ ArgVTs.push_back(VT);
ArgTypeDefs.push_back(TyEl);
}
- if (ArgTypes.size() == 0)
+ if (ArgVTs.size() == 0)
throw "Intrinsic '"+DefName+"' needs at least a type for the ret value!";
+
// Parse the intrinsic properties.
ListInit *PropList = R->getValueAsListInit("Properties");
for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
- DefInit *DI = dynamic_cast<DefInit*>(PropList->getElement(i));
- assert(DI && "Invalid list type!");
- Record *Property = DI->getDef();
+ Record *Property = PropList->getElementAsRecord(i);
assert(Property->isSubClassOf("IntrinsicProperty") &&
"Expected a property!");
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