Align Win64 EH Table sections to 4 bytes.

[oota-llvm.git] / utils / TableGen / CodeGenRegisters.h

diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h
index 6f8682be59d3d42fa9b423a30441ea778ef7d3ae..39b92c515ad7db10e25a2668b546d4b2d674d9d7 100644 (file)
--- a/utils/TableGen/CodeGenRegisters.h
+++ b/utils/TableGen/CodeGenRegisters.h
@@ -16,8 +16,10 @@
 #define CODEGEN_REGISTERS_H
 
 #include "llvm/CodeGen/ValueTypes.h"
+#include "llvm/ADT/DenseMap.h"
 #include <string>
 #include <vector>
+#include <set>
 #include <cstdlib>
 
 namespace llvm {
@@ -27,7 +29,8 @@ namespace llvm {
   struct CodeGenRegister {
     Record *TheDef;
     const std::string &getName() const;
-    unsigned DeclaredSpillSize, DeclaredSpillAlignment;
+    unsigned EnumValue;
+    unsigned CostPerUse;
     CodeGenRegister(Record *R);
   };
 
@@ -40,13 +43,14 @@ namespace llvm {
     unsigned SpillSize;
     unsigned SpillAlignment;
     int CopyCost;
-    std::vector<Record*> SubRegClasses;
+    // Map SubRegIndex -> RegisterClass
+    DenseMap<Record*,Record*> SubRegClasses;
     std::string MethodProtos, MethodBodies;
 
     const std::string &getName() const;
     const std::vector<MVT::SimpleValueType> &getValueTypes() const {return VTs;}
     unsigned getNumValueTypes() const { return VTs.size(); }
-    
+
     MVT::SimpleValueType getValueTypeNum(unsigned VTNum) const {
       if (VTNum < VTs.size())
         return VTs[VTNum];
@@ -54,6 +58,43 @@ namespace llvm {
       abort();
     }
 
+    bool containsRegister(Record *R) const {
+      for (unsigned i = 0, e = Elements.size(); i != e; ++i)
+        if (Elements[i] == R) return true;
+      return false;
+    }
+
+    // Returns true if RC is a strict subclass.
+    // RC is a sub-class of this class if it is a valid replacement for any
+    // instruction operand where a register of this classis required. It must
+    // satisfy these conditions:
+    //
+    // 1. All RC registers are also in this.
+    // 2. The RC spill size must not be smaller than our spill size.
+    // 3. RC spill alignment must be compatible with ours.
+    //
+    bool hasSubClass(const CodeGenRegisterClass *RC) const {
+
+      if (RC->Elements.size() > Elements.size() ||
+          (SpillAlignment && RC->SpillAlignment % SpillAlignment) ||
+          SpillSize > RC->SpillSize)
+        return false;
+
+      std::set<Record*> RegSet;
+      for (unsigned i = 0, e = Elements.size(); i != e; ++i) {
+        Record *Reg = Elements[i];
+        RegSet.insert(Reg);
+      }
+
+      for (unsigned i = 0, e = RC->Elements.size(); i != e; ++i) {
+        Record *Reg = RC->Elements[i];
+        if (!RegSet.count(Reg))
+          return false;
+      }
+
+      return true;
+    }
+
     CodeGenRegisterClass(Record *R);
   };
 }