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RegAllocGreedy: Allow target to specify register class ordering.
[oota-llvm.git]
/
utils
/
TableGen
/
CodeGenRegisters.h
diff --git
a/utils/TableGen/CodeGenRegisters.h
b/utils/TableGen/CodeGenRegisters.h
index 00e2957edc6ae4f4df1453dcfae39cfa5fa6e5ec..dc441436537db399cfb1d4f1d3a5501106f86277 100644
(file)
--- a/
utils/TableGen/CodeGenRegisters.h
+++ b/
utils/TableGen/CodeGenRegisters.h
@@
-306,6
+306,7
@@
namespace llvm {
int CopyCost;
bool Allocatable;
std::string AltOrderSelect;
+ uint8_t AllocationPriority;
/// Contains the combination of the lane masks of all subregisters.
unsigned LaneMask;
/// True if there are at least 2 subregisters which do not interfere.