std::string PrintMethod = "printOperand";
std::string EncoderMethod;
std::string OperandType = "OPERAND_UNKNOWN";
+ std::string OperandNamespace = "MCOI";
unsigned NumOps = 1;
- DagInit *MIOpInfo = 0;
+ DagInit *MIOpInfo = nullptr;
if (Rec->isSubClassOf("RegisterOperand")) {
PrintMethod = Rec->getValueAsString("PrintMethod");
+ OperandType = Rec->getValueAsString("OperandType");
+ OperandNamespace = Rec->getValueAsString("OperandNamespace");
} else if (Rec->isSubClassOf("Operand")) {
PrintMethod = Rec->getValueAsString("PrintMethod");
OperandType = Rec->getValueAsString("OperandType");
if (unsigned NumArgs = MIOpInfo->getNumArgs())
NumOps = NumArgs;
- if (Rec->isSubClassOf("PredicateOperand"))
+ if (Rec->isSubClassOf("PredicateOp"))
isPredicable = true;
else if (Rec->isSubClassOf("OptionalDefOperand"))
hasOptionalDef = true;
// Check that the operand has a name and that it's unique.
if (ArgName.empty())
- PrintFatalError("In instruction '" + R->getName() + "', operand #" + utostr(i) +
- " has no name!");
+ PrintFatalError("In instruction '" + R->getName() + "', operand #" +
+ Twine(i) + " has no name!");
if (!OperandNames.insert(ArgName).second)
- PrintFatalError("In instruction '" + R->getName() + "', operand #" + utostr(i) +
- " has the same name as a previous operand!");
+ PrintFatalError("In instruction '" + R->getName() + "', operand #" +
+ Twine(i) + " has the same name as a previous operand!");
OperandList.push_back(OperandInfo(Rec, ArgName, PrintMethod, EncoderMethod,
- OperandType, MIOperandNo, NumOps,
- MIOpInfo));
+ OperandNamespace + "::" + OperandType,
+ MIOperandNo, NumOps, MIOpInfo));
MIOperandNo += NumOps;
}
unsigned CGIOperandList::getOperandNamed(StringRef Name) const {
unsigned OpIdx;
if (hasOperandNamed(Name, OpIdx)) return OpIdx;
- PrintFatalError("'" + TheDef->getName() + "' does not have an operand named '$" +
- Name.str() + "'!");
+ PrintFatalError("'" + TheDef->getName() +
+ "' does not have an operand named '$" + Name + "'!");
}
/// hasOperandNamed - Query whether the instruction has an operand of the
// Find the suboperand number involved.
DagInit *MIOpInfo = OperandList[OpIdx].MIOperandInfo;
- if (MIOpInfo == 0)
+ if (!MIOpInfo)
PrintFatalError(TheDef->getName() + ": unknown suboperand name in '" + Op + "'");
// Find the operand with the right name.
// Otherwise, didn't find it!
PrintFatalError(TheDef->getName() + ": unknown suboperand name in '" + Op + "'");
+ return std::make_pair(0U, 0U);
}
static void ParseConstraint(const std::string &CStr, CGIOperandList &Ops) {
//===----------------------------------------------------------------------===//
CodeGenInstruction::CodeGenInstruction(Record *R)
- : TheDef(R), Operands(R), InferredFrom(0) {
+ : TheDef(R), Operands(R), InferredFrom(nullptr) {
Namespace = R->getValueAsString("Namespace");
AsmString = R->getValueAsString("AsmString");
hasPostISelHook = R->getValueAsBit("hasPostISelHook");
hasCtrlDep = R->getValueAsBit("hasCtrlDep");
isNotDuplicable = R->getValueAsBit("isNotDuplicable");
-
- mayLoad = R->getValueAsBitOrUnset("mayLoad", mayLoad_Unset);
- mayStore = R->getValueAsBitOrUnset("mayStore", mayStore_Unset);
- hasSideEffects = R->getValueAsBitOrUnset("hasSideEffects",
- hasSideEffects_Unset);
- neverHasSideEffects = R->getValueAsBit("neverHasSideEffects");
+ isRegSequence = R->getValueAsBit("isRegSequence");
+ isExtractSubreg = R->getValueAsBit("isExtractSubreg");
+ isInsertSubreg = R->getValueAsBit("isInsertSubreg");
+
+ bool Unset;
+ mayLoad = R->getValueAsBitOrUnset("mayLoad", Unset);
+ mayLoad_Unset = Unset;
+ mayStore = R->getValueAsBitOrUnset("mayStore", Unset);
+ mayStore_Unset = Unset;
+ hasSideEffects = R->getValueAsBitOrUnset("hasSideEffects", Unset);
+ hasSideEffects_Unset = Unset;
isAsCheapAsAMove = R->getValueAsBit("isAsCheapAsAMove");
hasExtraSrcRegAllocReq = R->getValueAsBit("hasExtraSrcRegAllocReq");
ImplicitDefs = R->getValueAsListOfDefs("Defs");
ImplicitUses = R->getValueAsListOfDefs("Uses");
- if (neverHasSideEffects + hasSideEffects > 1)
- PrintFatalError(R->getName() + ": multiple conflicting side-effect flags set!");
-
// Parse Constraints.
ParseConstraints(R->getValueAsString("Constraints"), Operands);
// Parse the DisableEncoding field.
Operands.ProcessDisableEncoding(R->getValueAsString("DisableEncoding"));
+
+ // First check for a ComplexDeprecationPredicate.
+ if (R->getValue("ComplexDeprecationPredicate")) {
+ HasComplexDeprecationPredicate = true;
+ DeprecatedReason = R->getValueAsString("ComplexDeprecationPredicate");
+ } else if (RecordVal *Dep = R->getValue("DeprecatedFeatureMask")) {
+ // Check if we have a Subtarget feature mask.
+ HasComplexDeprecationPredicate = false;
+ DeprecatedReason = Dep->getValue()->getAsString();
+ } else {
+ // This instruction isn't deprecated.
+ HasComplexDeprecationPredicate = false;
+ DeprecatedReason = "";
+ }
}
/// HasOneImplicitDefWithKnownVT - If the instruction has at least one
ResultOperand &ResOp) {
Init *Arg = Result->getArg(AliasOpNo);
DefInit *ADI = dyn_cast<DefInit>(Arg);
+ Record *ResultRecord = ADI ? ADI->getDef() : nullptr;
if (ADI && ADI->getDef() == InstOpRec) {
// If the operand is a record, it must have a name, and the record type
// must match up with the instruction's argument type.
if (Result->getArgName(AliasOpNo).empty())
- PrintFatalError(Loc, "result argument #" + utostr(AliasOpNo) +
- " must have a name!");
- ResOp = ResultOperand(Result->getArgName(AliasOpNo), ADI->getDef());
+ PrintFatalError(Loc, "result argument #" + Twine(AliasOpNo) +
+ " must have a name!");
+ ResOp = ResultOperand(Result->getArgName(AliasOpNo), ResultRecord);
return true;
}
// For register operands, the source register class can be a subclass
// of the instruction register class, not just an exact match.
+ if (InstOpRec->isSubClassOf("RegisterOperand"))
+ InstOpRec = InstOpRec->getValueAsDef("RegClass");
+
+ if (ADI && ADI->getDef()->isSubClassOf("RegisterOperand"))
+ ADI = ADI->getDef()->getValueAsDef("RegClass")->getDefInit();
+
if (ADI && ADI->getDef()->isSubClassOf("RegisterClass")) {
if (!InstOpRec->isSubClassOf("RegisterClass"))
return false;
if (!T.getRegisterClass(InstOpRec)
.hasSubClass(&T.getRegisterClass(ADI->getDef())))
return false;
- ResOp = ResultOperand(Result->getArgName(AliasOpNo), ADI->getDef());
+ ResOp = ResultOperand(Result->getArgName(AliasOpNo), ResultRecord);
return true;
}
InstOpRec = cast<DefInit>(DI->getArg(0))->getDef();
}
- if (InstOpRec->isSubClassOf("RegisterOperand"))
- InstOpRec = InstOpRec->getValueAsDef("RegClass");
-
if (!InstOpRec->isSubClassOf("RegisterClass"))
return false;
PrintFatalError(Loc, "result fixed register argument must "
"not have a name!");
- ResOp = ResultOperand(ADI->getDef());
+ ResOp = ResultOperand(ResultRecord);
return true;
}
// throw TGError(Loc, "reg0 used for result that is not an "
// "OptionalDefOperand!");
- ResOp = ResultOperand(static_cast<Record*>(0));
+ ResOp = ResultOperand(static_cast<Record*>(nullptr));
return true;
}
return false;
// Integer arguments can't have names.
if (!Result->getArgName(AliasOpNo).empty())
- PrintFatalError(Loc, "result argument #" + utostr(AliasOpNo) +
+ PrintFatalError(Loc, "result argument #" + Twine(AliasOpNo) +
" must not have a name!");
ResOp = ResultOperand(II->getValue());
return true;
}
+ // Bits<n> (also used for 0bxx literals)
+ if (BitsInit *BI = dyn_cast<BitsInit>(Arg)) {
+ if (hasSubOps || !InstOpRec->isSubClassOf("Operand"))
+ return false;
+ if (!BI->isComplete())
+ return false;
+ // Convert the bits init to an integer and use that for the result.
+ IntInit *II =
+ dyn_cast_or_null<IntInit>(BI->convertInitializerTo(IntRecTy::get()));
+ if (!II)
+ return false;
+ ResOp = ResultOperand(II->getValue());
+ return true;
+ }
+
// If both are Operands with the same MVT, allow the conversion. It's
// up to the user to make sure the values are appropriate, just like
// for isel Pat's.
- if (InstOpRec->isSubClassOf("Operand") &&
+ if (InstOpRec->isSubClassOf("Operand") && ADI &&
ADI->getDef()->isSubClassOf("Operand")) {
// FIXME: What other attributes should we check here? Identical
// MIOperandInfo perhaps?
return false;
}
-CodeGenInstAlias::CodeGenInstAlias(Record *R, CodeGenTarget &T) : TheDef(R) {
- AsmString = R->getValueAsString("AsmString");
+unsigned CodeGenInstAlias::ResultOperand::getMINumOperands() const {
+ if (!isRecord())
+ return 1;
+
+ Record *Rec = getRecord();
+ if (!Rec->isSubClassOf("Operand"))
+ return 1;
+
+ DagInit *MIOpInfo = Rec->getValueAsDag("MIOperandInfo");
+ if (MIOpInfo->getNumArgs() == 0) {
+ // Unspecified, so it defaults to 1
+ return 1;
+ }
+
+ return MIOpInfo->getNumArgs();
+}
+
+CodeGenInstAlias::CodeGenInstAlias(Record *R, unsigned Variant,
+ CodeGenTarget &T)
+ : TheDef(R) {
Result = R->getValueAsDag("ResultInst");
+ AsmString = R->getValueAsString("AsmString");
+ AsmString = CodeGenInstruction::FlattenAsmStringVariants(AsmString, Variant);
+
// Verify that the root of the result is an instruction.
DefInit *DI = dyn_cast<DefInit>(Result->getOperator());
- if (DI == 0 || !DI->getDef()->isSubClassOf("Instruction"))
+ if (!DI || !DI->getDef()->isSubClassOf("Instruction"))
PrintFatalError(R->getLoc(),
"result of inst alias should be an instruction");
ResultInstOperandIndex.push_back(std::make_pair(i, SubOp));
++AliasOpNo;
} else {
- PrintFatalError(R->getLoc(), "result argument #" + utostr(AliasOpNo) +
+ PrintFatalError(R->getLoc(), "result argument #" + Twine(AliasOpNo) +
" does not match instruction operand class " +
(SubOp == 0 ? InstOpRec->getName() :SubRec->getName()));
}
}
continue;
}
- PrintFatalError(R->getLoc(), "result argument #" + utostr(AliasOpNo) +
+ PrintFatalError(R->getLoc(), "result argument #" + Twine(AliasOpNo) +
" does not match instruction operand class " +
InstOpRec->getName());
}
projects / oota-llvm.git / blobdiff