[AVX] Unique BitInit

[oota-llvm.git] / utils / TableGen / CodeGenDAGPatterns.h

diff --git a/utils/TableGen/CodeGenDAGPatterns.h b/utils/TableGen/CodeGenDAGPatterns.h
index f517219ee7e81de8c6929612a8a52dc05fd965eb..833eef0653b0db367a4d464af4d4f9edc8c83885 100644 (file)
--- a/utils/TableGen/CodeGenDAGPatterns.h
+++ b/utils/TableGen/CodeGenDAGPatterns.h
@@ -26,7 +26,7 @@
 
 namespace llvm {
   class Record;
-  struct Init;
+  class Init;
   class ListInit;
   class DagInit;
   class SDNodeInfo;
@@ -639,7 +639,7 @@ public:
       Dstregs(dstregs), AddedComplexity(complexity), ID(uid) {}
 
   Record          *SrcRecord;   // Originating Record for the pattern.
-  const ListInit  *Predicates;  // Top level predicate conditions to match.
+  const ListInit        *Predicates;  // Top level predicate conditions to match.
   TreePatternNode *SrcPattern;  // Source pattern to match.
   TreePatternNode *DstPattern;  // Resulting pattern.
   std::vector<Record*> Dstregs; // Physical register defs being matched.
@@ -647,7 +647,7 @@ public:
   unsigned         ID;          // Unique ID for the record.
 
   Record          *getSrcRecord()  const { return SrcRecord; }
-  const ListInit  *getPredicates() const { return Predicates; }
+  const ListInit        *getPredicates() const { return Predicates; }
   TreePatternNode *getSrcPattern() const { return SrcPattern; }
   TreePatternNode *getDstPattern() const { return DstPattern; }
   const std::vector<Record*> &getDstRegs() const { return Dstregs; }