#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include <algorithm>
+#include <iostream>
using namespace llvm;
static bool isIdentChar(char C) {
LastEmitted = VarEnd;
}
}
-
- AddLiteralString("\\n");
}
/// MatchesAllButOneOp - If this instruction is exactly identical to the
}
static void PrintCases(std::vector<std::pair<std::string,
- AsmWriterOperand> > &OpsToPrint, std::ostream &O) {
+ AsmWriterOperand> > &OpsToPrint, raw_ostream &O) {
O << " case " << OpsToPrint.back().first << ": ";
AsmWriterOperand TheOp = OpsToPrint.back().second;
OpsToPrint.pop_back();
/// EmitInstructions - Emit the last instruction in the vector and any other
/// instructions that are suitably similar to it.
static void EmitInstructions(std::vector<AsmWriterInst> &Insts,
- std::ostream &O) {
+ raw_ostream &O) {
AsmWriterInst FirstInst = Insts.back();
Insts.pop_back();
}
O << "\n";
}
-
O << " break;\n";
}
Command = " " + Inst->Operands[0].getCode() + "\n";
// If this is the last operand, emit a return.
- if (Inst->Operands.size() == 1)
+ if (Inst->Operands.size() == 1) {
+ Command += " EmitComments(*MI);\n";
+ // Print the final newline
+ Command += " O << \"\\n\";\n";
Command += " return true;\n";
+ }
// Check to see if we already have 'Command' in UniqueOperandCommands.
// If not, add it.
std::string Command = " " + FirstInst->Operands[Op].getCode() + "\n";
// If this is the last operand, emit a return after the code.
- if (FirstInst->Operands.size() == Op+1)
+ if (FirstInst->Operands.size() == Op+1) {
+ Command += " EmitComments(*MI);\n";
+ // Print the final newline
+ Command += " O << \"\\n\";\n";
Command += " return true;\n";
+ }
UniqueOperandCommands[CommandIdx] += Command;
InstOpsUsed[CommandIdx]++;
-void AsmWriterEmitter::run(std::ostream &O) {
+void AsmWriterEmitter::run(raw_ostream &O) {
EmitSourceFileHeader("Assembly Writer Source Fragment", O);
CodeGenTarget Target;
// For the first operand check, add a default value for instructions with
// just opcode strings to use.
if (isFirst) {
- UniqueOperandCommands.push_back(" return true;\n");
+ // Do the post instruction processing and print the final newline
+ UniqueOperandCommands.push_back(" EmitComments(*MI);\n O << \"\\n\";\n return true;\n");
isFirst = false;
}
-
+
std::vector<unsigned> InstIdxs;
std::vector<unsigned> NumInstOpsHandled;
FindUniqueOperandCommands(UniqueOperandCommands, InstIdxs,
}
O << "\";\n\n";
- O << " if (TAI->doesSupportDebugInformation() &&\n"
- << " DW->ShouldEmitDwarfDebug() && OptLevel != 0) {\n"
- << " DebugLoc CurDL = MI->getDebugLoc();\n\n"
- << " if (!CurDL.isUnknown()) {\n"
- << " static DebugLocTuple PrevDLT(~0U, ~0U, ~0U);\n"
- << " DebugLocTuple CurDLT = MF->getDebugLocTuple(CurDL);\n\n"
- << " if (PrevDLT.Src != ~0U && PrevDLT != CurDLT)\n"
- << " printLabel(DW->RecordSourceLine(CurDLT.Line, CurDLT.Col,\n"
- << " CurDLT.Src));\n\n"
- << " PrevDLT = CurDLT;\n"
- << " }\n"
- << " }\n\n";
+ O << " processDebugLoc(MI->getDebugLoc());\n\n";
+ O << "\n#ifndef NO_ASM_WRITER_BOILERPLATE\n";
+
O << " if (MI->getOpcode() == TargetInstrInfo::INLINEASM) {\n"
<< " O << \"\\t\";\n"
<< " printInlineAsm(MI);\n"
<< " printImplicitDef(MI);\n"
<< " return true;\n"
<< " }\n\n";
-
+
+ O << "\n#endif\n";
+
O << " O << \"\\t\";\n\n";
O << " // Emit the opcode for the instruction.\n"
EmitInstructions(Instructions, O);
O << " }\n";
+ O << " EmitComments(*MI);\n";
+ // Print the final newline
+ O << " O << \"\\n\";\n";
O << " return true;\n";
}