Make the AsmWriter a first-class tblgen object. Allow targets to specify

[oota-llvm.git] / utils / TableGen / AsmWriterEmitter.cpp

diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index b2e2125f82afdd2f6f0bde69426f92b405f4d1a0..7b3a5046c3c1d9349d9e6061ce00072f97a726c1 100644 (file)
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -14,6 +14,7 @@
 
 #include "AsmWriterEmitter.h"
 #include "CodeGenTarget.h"
+#include "Record.h"
 #include <ostream>
 using namespace llvm;
 
@@ -28,13 +29,19 @@ void AsmWriterEmitter::run(std::ostream &O) {
   EmitSourceFileHeader("Assembly Writer Source Fragment", O);
 
   CodeGenTarget Target;
+
+  Record *AsmWriter = Target.getAsmWriter();
+
+  std::string AsmWriterClassName =
+    AsmWriter->getValueAsString("AsmWriterClassName");
+
   O <<
   "/// printInstruction - This method is automatically generated by tablegen\n"
   "/// from the instruction set description.  This method returns true if the\n"
   "/// machine instruction was sufficiently described to print it, otherwise\n"
   "/// it returns false.\n"
-    "bool " << Target.getName()
-            << "AsmPrinter::printInstruction(const MachineInstr *MI) {\n";
+    "bool " << Target.getName() << AsmWriterClassName
+            << "::printInstruction(const MachineInstr *MI) {\n";
   O << "  switch (MI->getOpcode()) {\n"
        "  default: return false;\n";