Get rid of a pseudo instruction and replace it with subreg based operation on real...

[oota-llvm.git] / utils / TableGen / AsmWriterEmitter.cpp

diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp
index 6466b5fecd92ba98b6c400b9bbed5770331e6770..5a24b26422e36437304f7028b14a8bb1583236ab 100644 (file)
--- a/utils/TableGen/AsmWriterEmitter.cpp
+++ b/utils/TableGen/AsmWriterEmitter.cpp
@@ -2,8 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -19,7 +19,6 @@
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/MathExtras.h"
 #include <algorithm>
-#include <ostream>
 using namespace llvm;
 
 static bool isIdentChar(char C) {
@@ -29,7 +28,8 @@ static bool isIdentChar(char C) {
          C == '_';
 }
 
-namespace {
+// This should be an anon namespace, this works around a GCC warning.
+namespace llvm {  
   struct AsmWriterOperand {
     enum { isLiteralTextOperand, isMachineInstrOperand } OperandType;
 
@@ -220,16 +220,11 @@ AsmWriterInst::AsmWriterInst(const CodeGenInstruction &CGI, unsigned Variant) {
         unsigned OpNo = CGI.getOperandNamed(VarName);
         CodeGenInstruction::OperandInfo OpInfo = CGI.OperandList[OpNo];
 
-        // If this is a two-address instruction, verify the second operand isn't
-        // used.
-        unsigned MIOp = OpInfo.MIOperandNo;
-        if (CGI.isTwoAddress && MIOp == 1)
-          throw "Should refer to operand #0 instead of #1 for two-address"
-                " instruction '" + CGI.TheDef->getName() + "'!";
-        
-        if (CurVariant == Variant || CurVariant == ~0U) 
+        if (CurVariant == Variant || CurVariant == ~0U) {
+          unsigned MIOp = OpInfo.MIOperandNo;
           Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName, MIOp,
                                               Modifier));
+        }
       }
       LastEmitted = VarEnd;
     }
@@ -247,11 +242,12 @@ unsigned AsmWriterInst::MatchesAllButOneOp(const AsmWriterInst &Other)const{
 
   unsigned MismatchOperand = ~0U;
   for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
-    if (Operands[i] != Other.Operands[i])
+    if (Operands[i] != Other.Operands[i]) {
       if (MismatchOperand != ~0U)  // Already have one mismatch?
         return ~1U;
       else
         MismatchOperand = i;
+    }
   }
   return MismatchOperand;
 }
@@ -350,7 +346,7 @@ FindUniqueOperandCommands(std::vector<std::string> &UniqueOperandCommands,
   
   for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) {
     const AsmWriterInst *Inst = getAsmWriterInstByID(i);
-    if (Inst == 0) continue;  // PHI, INLINEASM, etc.
+    if (Inst == 0) continue;  // PHI, INLINEASM, LABEL, etc.
     
     std::string Command;
     if (Inst->Operands.empty())
@@ -556,8 +552,8 @@ void AsmWriterEmitter::run(std::ostream &O) {
     
     // If we don't have enough bits for this operand, don't include it.
     if (NumBits > BitsLeft) {
-      DEBUG(std::cerr << "Not enough bits to densely encode " << NumBits
-                      << " more bits\n");
+      DOUT << "Not enough bits to densely encode " << NumBits
+           << " more bits\n";
       break;
     }
     
@@ -625,10 +621,19 @@ void AsmWriterEmitter::run(std::ostream &O) {
   O << "\";\n\n";
 
   O << "  if (MI->getOpcode() == TargetInstrInfo::INLINEASM) {\n"
+    << "    O << \"\\t\";\n"
     << "    printInlineAsm(MI);\n"
     << "    return true;\n"
+    << "  } else if (MI->getOpcode() == TargetInstrInfo::LABEL) {\n"
+    << "    printLabel(MI);\n"
+    << "    return true;\n"
+    << "  } else if (MI->getOpcode() == TargetInstrInfo::DECLARE) {\n"
+    << "    printDeclare(MI);\n"
+    << "    return true;\n"
     << "  }\n\n";
   
+  O << "  O << \"\\t\";\n\n";
+
   O << "  // Emit the opcode for the instruction.\n"
     << "  unsigned Bits = OpInfo[MI->getOpcode()];\n"
     << "  if (Bits == 0) return false;\n"