; Completely unroll loops without a canonical IV.
;
-; CHECK: @sansCanonical
+; CHECK-LABEL: @sansCanonical(
; CHECK-NOT: phi
; CHECK-NOT: icmp
; CHECK: ret
%iv = phi i64 [ 10, %entry ], [ %iv.next, %while.body ]
%sum = phi i32 [ 0, %entry ], [ %sum.next, %while.body ]
%iv.next = add i64 %iv, -1
- %adr = getelementptr inbounds i32* %base, i64 %iv.next
- %tmp = load i32* %adr, align 8
+ %adr = getelementptr inbounds i32, i32* %base, i64 %iv.next
+ %tmp = load i32, i32* %adr, align 8
%sum.next = add i32 %sum, %tmp
%iv.narrow = trunc i64 %iv.next to i32
%cmp.i65 = icmp sgt i32 %iv.narrow, 0
; latch block. Canonical unrolling incorrectly unrolls it, but SCEV
; unrolling does not.
;
-; CHECK: @earlyLoopTest
+; CHECK-LABEL: @earlyLoopTest(
; CHECK: tail:
; CHECK-NOT: br
; CHECK: br i1 %cmp2, label %loop, label %exit2
loop:
%iv = phi i64 [ 0, %entry ], [ %inc, %tail ]
%s = phi i64 [ 0, %entry ], [ %s.next, %tail ]
- %adr = getelementptr i64* %base, i64 %iv
- %val = load i64* %adr
+ %adr = getelementptr i64, i64* %base, i64 %iv
+ %val = load i64, i64* %adr
%s.next = add i64 %s, %val
%inc = add i64 %iv, 1
%cmp = icmp ne i64 %inc, 4
; SCEV properly unrolls multi-exit loops.
;
-; CHECK: @multiExit
-; CHECK: getelementptr i32* %base, i64 10
-; CHECK-NEXT: load i32*
+; CHECK-LABEL: @multiExit(
+; CHECK: getelementptr i32, i32* %base, i32 10
+; CHECK-NEXT: load i32, i32*
; CHECK: br i1 false, label %l2.10, label %exit1
; CHECK: l2.10:
; CHECK-NOT: br
%iv2 = phi i32 [ 0, %entry ], [ %inc2, %l2 ]
%inc1 = add i32 %iv1, 1
%inc2 = add i32 %iv2, 1
- %adr = getelementptr i32* %base, i32 %iv1
- %val = load i32* %adr
+ %adr = getelementptr i32, i32* %base, i32 %iv1
+ %val = load i32, i32* %adr
%cmp1 = icmp slt i32 %iv1, 5
br i1 %cmp1, label %l2, label %exit1
l2:
; LoopUnroll utility uses this assumption to optimize the latch
; block's branch.
;
-; CHECK: @multiExit
+; CHECK-LABEL: @multiExitIncomplete(
; CHECK: l3:
; CHECK-NOT: br
; CHECK: br i1 %cmp3, label %l1, label %exit3
%iv2 = phi i32 [ 0, %entry ], [ %inc2, %l3 ]
%inc1 = add i32 %iv1, 1
%inc2 = add i32 %iv2, 1
- %adr = getelementptr i32* %base, i32 %iv1
- %val = load i32* %adr
+ %adr = getelementptr i32, i32* %base, i32 %iv1
+ %val = load i32, i32* %adr
%cmp1 = icmp slt i32 %iv1, 5
br i1 %cmp1, label %l2, label %exit1
l2:
; When loop unroll merges a loop exit with one of its parent loop's
; exits, SCEV must forget its ExitNotTaken info.
;
-; CHECK: @nestedUnroll
+; CHECK-LABEL: @nestedUnroll(
; CHECK-NOT: br i1
; CHECK: for.body87:
define void @nestedUnroll() nounwind {
br label %for.body87
}
+; PR16130: clang produces incorrect code with loop/expression at -O2
+; rdar:14036816 loop-unroll makes assumptions about undefined behavior
+;
+; The loop latch is assumed to exit after the first iteration because
+; of the induction variable's NSW flag. However, the loop latch's
+; equality test is skipped and the loop exits after the second
+; iteration via the early exit. So loop unrolling cannot assume that
+; the loop latch's exit count of zero is an upper bound on the number
+; of iterations.
+;
+; CHECK-LABEL: @nsw_latch(
+; CHECK: for.body:
+; CHECK: %b.03 = phi i32 [ 0, %entry ], [ %add, %for.cond ]
+; CHECK: return:
+; CHECK: %b.03.lcssa = phi i32 [ %b.03, %for.body ], [ %b.03, %for.cond ]
+define void @nsw_latch(i32* %a) nounwind {
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.cond, %entry
+ %b.03 = phi i32 [ 0, %entry ], [ %add, %for.cond ]
+ %tobool = icmp eq i32 %b.03, 0
+ %add = add nsw i32 %b.03, 8
+ br i1 %tobool, label %for.cond, label %return
+
+for.cond: ; preds = %for.body
+ %cmp = icmp eq i32 %add, 13
+ br i1 %cmp, label %return, label %for.body
+
+return: ; preds = %for.body, %for.cond
+ %b.03.lcssa = phi i32 [ %b.03, %for.body ], [ %b.03, %for.cond ]
+ %retval.0 = phi i32 [ 1, %for.body ], [ 0, %for.cond ]
+ store i32 %b.03.lcssa, i32* %a, align 4
+ ret void
+}