; RUN: opt < %s -instcombine -S | FileCheck %s
-; CHECK: @sdiv1
+; CHECK-LABEL: @sdiv1(
; CHECK: sdiv i32 %x, 8
define i32 @sdiv1(i32 %x) {
%y = sdiv i32 %x, 8
ret i32 %y
}
-; CHECK: @sdiv2
+; CHECK-LABEL: @sdiv2(
; CHECK: ashr exact i32 %x, 3
define i32 @sdiv2(i32 %x) {
%y = sdiv exact i32 %x, 8
ret i32 %y
}
-; CHECK: @sdiv3
+; CHECK-LABEL: @sdiv3(
; CHECK: %y = srem i32 %x, 3
; CHECK: %z = sub i32 %x, %y
; CHECK: ret i32 %z
ret i32 %z
}
-; CHECK: @sdiv4
+; CHECK-LABEL: @sdiv4(
; CHECK: ret i32 %x
define i32 @sdiv4(i32 %x) {
%y = sdiv exact i32 %x, 3
ret i32 %z
}
-; CHECK: @sdiv6
+; CHECK-LABEL: @sdiv6(
; CHECK: %z = sub i32 0, %x
; CHECK: ret i32 %z
define i32 @sdiv6(i32 %x) {
ret i32 %z
}
-; CHECK: @udiv1
+; CHECK-LABEL: @udiv1(
; CHECK: ret i32 %x
define i32 @udiv1(i32 %x, i32 %w) {
%y = udiv exact i32 %x, %w
ret i32 %z
}
-; CHECK: @udiv2
+; CHECK-LABEL: @udiv2(
; CHECK: %z = lshr exact i32 %x, %w
; CHECK: ret i32 %z
define i32 @udiv2(i32 %x, i32 %w) {
ret i32 %z
}
-; CHECK: @ashr1
+; CHECK-LABEL: @ashr1(
; CHECK: %B = ashr exact i64 %A, 2
; CHECK: ret i64 %B
define i64 @ashr1(i64 %X) nounwind {
}
; PR9120
-; CHECK: @ashr_icmp1
+; CHECK-LABEL: @ashr_icmp1(
; CHECK: %B = icmp eq i64 %X, 0
; CHECK: ret i1 %B
define i1 @ashr_icmp1(i64 %X) nounwind {
ret i1 %B
}
-; CHECK: @ashr_icmp2
+; CHECK-LABEL: @ashr_icmp2(
; CHECK: %Z = icmp slt i64 %X, 16
; CHECK: ret i1 %Z
define i1 @ashr_icmp2(i64 %X) nounwind {
; PR9998
; Make sure we don't transform the ashr here into an sdiv
-; CHECK: @pr9998
-; CHECK: = and i32 %V, 1
-; CHECK: %Z = icmp ne
-; CHECK: ret i1 %Z
+; CHECK-LABEL: @pr9998(
+; CHECK: [[BIT:%[A-Za-z0-9.]+]] = and i32 %V, 1
+; CHECK-NEXT: [[CMP:%[A-Za-z0-9.]+]] = icmp ne i32 [[BIT]], 0
+; CHECK-NEXT: ret i1 [[CMP]]
define i1 @pr9998(i32 %V) nounwind {
entry:
%W = shl i32 %V, 31
}
-; CHECK: @udiv_icmp1
+
+; CHECK-LABEL: @udiv_icmp1(
; CHECK: icmp ne i64 %X, 0
define i1 @udiv_icmp1(i64 %X) nounwind {
%A = udiv exact i64 %X, 5 ; X/5
ret i1 %B
}
-; CHECK: @sdiv_icmp1
+; CHECK-LABEL: @sdiv_icmp1(
; CHECK: icmp eq i64 %X, 0
define i1 @sdiv_icmp1(i64 %X) nounwind {
%A = sdiv exact i64 %X, 5 ; X/5 == 0 --> x == 0
ret i1 %B
}
-; CHECK: @sdiv_icmp2
+; CHECK-LABEL: @sdiv_icmp2(
; CHECK: icmp eq i64 %X, 5
define i1 @sdiv_icmp2(i64 %X) nounwind {
%A = sdiv exact i64 %X, 5 ; X/5 == 1 --> x == 5
ret i1 %B
}
-; CHECK: @sdiv_icmp3
+; CHECK-LABEL: @sdiv_icmp3(
; CHECK: icmp eq i64 %X, -5
define i1 @sdiv_icmp3(i64 %X) nounwind {
%A = sdiv exact i64 %X, 5 ; X/5 == -1 --> x == -5
ret i1 %B
}
-; CHECK: @sdiv_icmp4
+; CHECK-LABEL: @sdiv_icmp4(
; CHECK: icmp eq i64 %X, 0
define i1 @sdiv_icmp4(i64 %X) nounwind {
%A = sdiv exact i64 %X, -5 ; X/-5 == 0 --> x == 0
ret i1 %B
}
-; CHECK: @sdiv_icmp5
+; CHECK-LABEL: @sdiv_icmp5(
; CHECK: icmp eq i64 %X, -5
define i1 @sdiv_icmp5(i64 %X) nounwind {
%A = sdiv exact i64 %X, -5 ; X/-5 == 1 --> x == -5
ret i1 %B
}
-; CHECK: @sdiv_icmp6
+; CHECK-LABEL: @sdiv_icmp6(
; CHECK: icmp eq i64 %X, 5
define i1 @sdiv_icmp6(i64 %X) nounwind {
%A = sdiv exact i64 %X, -5 ; X/-5 == 1 --> x == 5