[PHITransAddr] Don't assume that instruction operands are translatable

[oota-llvm.git] / test / Transforms / GVN / 2007-07-25-NestedLoop.ll

diff --git a/test/Transforms/GVN/2007-07-25-NestedLoop.ll b/test/Transforms/GVN/2007-07-25-NestedLoop.ll
index 6a7a4090315746d3ca3da973fcd3648f5ba15a1e..8f2c182faa89c39f831257f98a865d186cba49a8 100644 (file)
--- a/test/Transforms/GVN/2007-07-25-NestedLoop.ll
+++ b/test/Transforms/GVN/2007-07-25-NestedLoop.ll
@@ -11,21 +11,21 @@ bb534.preheader:            ; preds = %entry
 
 bb556.preheader:               ; preds = %entry
        %tmp56119 = getelementptr %struct.TypHeader, %struct.TypHeader* %hdR, i32 0, i32 0              ; <i32*> [#uses=1]
-       %tmp56220 = load i32* %tmp56119         ; <i32> [#uses=0]
+       %tmp56220 = load i32, i32* %tmp56119            ; <i32> [#uses=0]
        br i1 false, label %bb.nph23, label %bb675.preheader
 
 bb.nph23:              ; preds = %bb556.preheader
        ret %struct.TypHeader* null
 
 bb656:         ; preds = %bb675.outer, %bb656
-       %tmp678 = load i32* %tmp677             ; <i32> [#uses=0]
+       %tmp678 = load i32, i32* %tmp677                ; <i32> [#uses=0]
        br i1 false, label %bb684, label %bb656
 
 bb684:         ; preds = %bb675.outer, %bb656
        br i1 false, label %bb924.preheader, label %bb675.outer
 
 bb675.outer:           ; preds = %bb675.preheader, %bb684
-       %tmp67812 = load i32* %tmp67711         ; <i32> [#uses=0]
+       %tmp67812 = load i32, i32* %tmp67711            ; <i32> [#uses=0]
        br i1 false, label %bb684, label %bb656
 
 bb675.preheader:               ; preds = %bb556.preheader