Current implementation of c.cond.fmt instructions only accept default cc0 register...

[oota-llvm.git] / test / MC / Mips / mips64r2 / valid.s

diff --git a/test/MC/Mips/mips64r2/valid.s b/test/MC/Mips/mips64r2/valid.s
index 7a2244a6642005f6d23689c67568af58d46e9baf..40f3bf4289329b80109521be3a8d0c15a6fa5612 100644 (file)
--- a/test/MC/Mips/mips64r2/valid.s
+++ b/test/MC/Mips/mips64r2/valid.s
@@ -28,6 +28,34 @@
         c.ngle.d  $f0,$f16
         c.sf.d    $f30,$f0
         c.sf.s    $f14,$f22
+        c.eq.d    $fcc1,$f15,$f15
+        c.eq.s    $fcc5,$f24,$f17
+        c.f.d     $fcc4,$f11,$f21
+        c.f.s     $fcc4,$f30,$f7
+        c.le.d    $fcc4,$f18,$f1
+        c.le.s    $fcc6,$f24,$f4
+        c.lt.d    $fcc3,$f9,$f3
+        c.lt.s    $fcc2,$f17,$f14
+        c.nge.d   $fcc5,$f21,$f16
+        c.nge.s   $fcc3,$f11,$f8
+        c.ngl.s   $fcc2,$f31,$f23
+        c.ngle.s  $fcc2,$f18,$f23
+        c.ngt.d   $fcc4,$f24,$f7
+        c.ngt.s   $fcc5,$f8,$f13
+        c.ole.d   $fcc2,$f16,$f31
+        c.ole.s   $fcc3,$f7,$f20
+        c.olt.d   $fcc4,$f19,$f28
+        c.olt.s   $fcc6,$f20,$f7
+        c.seq.d   $fcc4,$f31,$f7
+        c.seq.s   $fcc7,$f1,$f25
+        c.ueq.d   $fcc4,$f13,$f25
+        c.ueq.s   $fcc6,$f3,$f30
+        c.ule.d   $fcc7,$f25,$f18
+        c.ule.s   $fcc7,$f21,$f30
+        c.ult.d   $fcc6,$f6,$f17
+        c.ult.s   $fcc7,$f24,$f10
+        c.un.d    $fcc6,$f23,$f24
+        c.un.s    $fcc1,$f30,$f4
         ceil.l.d  $f1,$f3
         ceil.l.s  $f18,$f13
         ceil.w.d  $f11,$f25