[mips][microMIPSr6] Implement SELEQZ and SELNEZ instructions

[oota-llvm.git] / test / MC / Disassembler / Mips / micromips32r6.txt

diff --git a/test/MC/Disassembler/Mips/micromips32r6.txt b/test/MC/Disassembler/Mips/micromips32r6.txt
index 6e2990ccbcbbf3900d4b3c423a3ed7b76433af03..ef10f564680aff9fc0ff28a321ec7c80c36ce84f 100644 (file)
--- a/test/MC/Disassembler/Mips/micromips32r6.txt
+++ b/test/MC/Disassembler/Mips/micromips32r6.txt
@@ -6,6 +6,12 @@
 
 0x00 0xa4 0x19 0x50 # CHECK: addu $3, $4, $5
 
+0x78 0x80 0x00 0x19 # CHECK: addiupc $4, 100
+
+0x78 0x7f 0x00 0x38 # CHECK: aluipc $3, 56
+
+0x78 0x7e 0xff 0xff # CHECK: auipc $3, -1
+
 # CHECK: balc 14572256
 0xb4 0x37 0x96 0xb8
 
@@ -18,6 +24,12 @@
 # CHECK: cache 1, 8($5)
 0x20 0x25 0x60 0x08
 
+0x80 0x05 0x01 0x00 # CHECK: jialc $5, 256
+
+0xa0 0x05 0x01 0x00 # CHECK: jic $5, 256
+
+0x78 0x48 0x00 0x43 # CHECK: lwpc $2, 268
+
 0x00 0xa4 0x18 0x18 # CHECK: mul $3, $4, $5
 
 0x00 0xa4 0x18 0x58 # CHECK: muh $3, $4, $5
@@ -29,6 +41,10 @@
 # CHECK: pref 1, 8($5)
 0x60 0x25 0x20 0x08
 
+0x00 0x83 0x11 0x40 # CHECK: seleqz $2, $3, $4
+
+0x00 0x83 0x11 0x80 # CHECK: selnez $2, $3, $4
+
 0x00 0xa4 0x19 0x90 # CHECK: sub $3, $4, $5
 
 0x00 0xa4 0x19 0xd0 # CHECK: subu $3, $4, $5