Fix the instruction table entries for AI1_adde_sube_s_irs multiclass definition so...

[oota-llvm.git] / test / MC / Disassembler / ARM / arm-tests.txt

diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt
index 4e39e8e9b3cb2bfdd6f0acd1b07ad5d245ee48bf..c66f8ce9688688cf11ef3464790f2aef6d17b2ab 100644 (file)
--- a/test/MC/Disassembler/ARM/arm-tests.txt
+++ b/test/MC/Disassembler/ARM/arm-tests.txt
@@ -226,3 +226,10 @@
 
 # CHECK:       blx     #60
 0x0f 0x00 0x00 0xfa
+
+# CHECK-NOT:   adcs    r10, r8, r0, asr #6
+# CHECK:       adcshi  r10, r8, r0, asr #6
+0x40 0xa3 0xb8 0x80
+
+# CHECK:       adcshi  r10, r8, r0, asr r3
+0x50 0xa3 0xb8 0x80