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Add encoding for ARM "trap" instruction.
[oota-llvm.git]
/
test
/
MC
/
ARM
/
simple-encoding.ll
diff --git
a/test/MC/ARM/simple-encoding.ll
b/test/MC/ARM/simple-encoding.ll
index f279bdaa6347c44c3a9c29df4adb44b6e55b4bb0..0877e8e30c6f199d2099774eddd2000a302a34a5 100644
(file)
--- a/
test/MC/ARM/simple-encoding.ll
+++ b/
test/MC/ARM/simple-encoding.ll
@@
-12,7
+12,7
@@
declare i32 @llvm.ctlz.i32(i32)
define i32 @foo(i32 %a, i32 %b) {
; CHECK: foo
-; CHECK: trap @ encoding: [0xf
0,0x00,0xf0,0x0
7]
+; CHECK: trap @ encoding: [0xf
e,0xde,0xff,0xe
7]
; CHECK: bx lr @ encoding: [0x1e,0xff,0x2f,0xe1]
tail call void @llvm.trap()