[ARM] Add support for ARMV6K subtarget (LLVM)

[oota-llvm.git] / test / MC / ARM / directive-arch-armv3.s

diff --git a/test/MC/ARM/directive-arch-armv3.s b/test/MC/ARM/directive-arch-armv3.s
index 7b17faaedb27a5cf484266808c10438ccaa90d2e..41cce659246b5ddcda108c6628cceed4af8b2377 100644 (file)
--- a/test/MC/ARM/directive-arch-armv3.s
+++ b/test/MC/ARM/directive-arch-armv3.s
@@ -3,28 +3,28 @@
 @ This test case will check the default .ARM.attributes value for the
 @ armv3 architecture.
 
-@ RUN: llvm-mc < %s -arch=arm -filetype=asm \
-@ RUN:   | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -arch=arm -filetype=obj \
-@ RUN:   | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
 
        .syntax unified
        .arch   armv3
 
 @ CHECK-ASM:   .arch   armv3
 
-@ CHECK-OBJ:    Name: .ARM.attributes
-@ CHECK-OBJ:    Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ:    Flags [ (0x0)
-@ CHECK-OBJ:    ]
-@ CHECK-OBJ:    Address: 0x0
-@ CHECK-OBJ:    Offset: 0x34
-@ CHECK-OBJ:    Size: 23
-@ CHECK-OBJ:    Link: 0
-@ CHECK-OBJ:    Info: 0
-@ CHECK-OBJ:    AddressAlignment: 1
-@ CHECK-OBJ:    EntrySize: 0
-@ CHECK-OBJ:    SectionData (
-@ CHECK-OBJ:      0000: 41160000 00616561 62690001 0C000000  |A....aeabi......|
-@ CHECK-OBJ:      0010: 05330006 010801                      |.3.....|
-@ CHECK-OBJ:    )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_name
+@ CHECK-ATTR:     Value: 3
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: CPU_arch
+@ CHECK-ATTR:     Description: ARM v4
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR:     TagName: ARM_ISA_use
+@ CHECK-ATTR:     Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+